soc/amd/stoneyridge/acpi: introduce and use ACPI_SCI_IRQ definition
IRQ9 is used as ACPI SCI IRQ, so add a define for that and use it in the code like it is also done in the other SoCs in soc/amd. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Iddb51d70c15ab1d7088f62b61e22510bd1b30b1e Reviewed-on: https://review.coreboot.org/c/coreboot/+/73320 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -40,7 +40,7 @@ unsigned long acpi_fill_madt(unsigned long current)
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MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT);
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MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT);
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/* SCI IRQ type override */
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/* SCI IRQ type override */
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current,
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current,
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MP_BUS_ISA, 9, 9,
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MP_BUS_ISA, ACPI_SCI_IRQ, ACPI_SCI_IRQ,
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MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW);
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MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW);
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return current;
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return current;
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@ -54,7 +54,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
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{
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{
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printk(BIOS_DEBUG, "pm_base: 0x%04x\n", ACPI_IO_BASE);
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printk(BIOS_DEBUG, "pm_base: 0x%04x\n", ACPI_IO_BASE);
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fadt->sci_int = 9; /* IRQ 09 - ACPI SCI */
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fadt->sci_int = ACPI_SCI_IRQ;
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if (permanent_smi_handler()) {
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if (permanent_smi_handler()) {
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fadt->smi_cmd = APM_CNT;
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fadt->smi_cmd = APM_CNT;
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@ -6,6 +6,8 @@
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#include <acpi/acpi.h>
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#include <acpi/acpi.h>
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#include <amdblocks/acpi.h>
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#include <amdblocks/acpi.h>
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#define ACPI_SCI_IRQ 9
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#if CONFIG(STONEYRIDGE_LEGACY_FREE)
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#if CONFIG(STONEYRIDGE_LEGACY_FREE)
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#define FADT_BOOT_ARCH ACPI_FADT_LEGACY_FREE
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#define FADT_BOOT_ARCH ACPI_FADT_LEGACY_FREE
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#else
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#else
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