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sb/amd/cimx/sb800: Get rid of device_t 

Use of device_t has been abandoned in ramstage.

Change-Id: I2335b7e193663bb6c82bf267aaeb0b2367986f62
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26414
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Elyes HAOUAS 2018-05-19 16:49:20 +02:00 committed by Kyösti Mälkki
parent 4a027e6e95
commit 1a4abb73cd
6 changed files with 16 additions and 16 deletions
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6
src/southbridge/amd/cimx/sb800/fan.c
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@ -14,14 +14,14 @@
*/
#include <southbridge/amd/cimx/cimx_util.h>
#include <device/device.h> /* device_t */
#include <device/device.h>
#include <device/pci.h> /* device_operations */
#include "SBPLATFORM.h"
#include "sb_cimx.h"
#include "chip.h" /* struct southbridge_amd_cimx_sb800_config */
#include "fan.h"
void init_sb800_MANUAL_fans(device_t dev)
void init_sb800_MANUAL_fans(struct device *dev)
{
int i;
struct southbridge_amd_cimx_sb800_config *sb_chip =
@ -54,7 +54,7 @@ void init_sb800_MANUAL_fans(device_t dev)
}
void init_sb800_IMC_fans(device_t dev)
void init_sb800_IMC_fans(struct device *dev)
{
AMDSBCFG sb_config;

4
src/southbridge/amd/cimx/sb800/fan.h
View File

@ -17,8 +17,8 @@
#define _SB800_FAN_H_
#ifndef __PRE_RAM__
void init_sb800_IMC_fans(device_t dev);
void init_sb800_MANUAL_fans(device_t dev);
void init_sb800_IMC_fans(struct device *dev);
void init_sb800_MANUAL_fans(struct device *dev);
#endif
/* Fan Register Definitions */

8
src/southbridge/amd/cimx/sb800/late.c
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@ -15,7 +15,7 @@
*/
#include <device/device.h> /* device_t */
#include <device/device.h>
#include <device/pci.h> /* device_operations */
#include <device/pci_ids.h>
#include <bootstate.h>
@ -118,7 +118,7 @@ static struct pci_operations lops_pci = {
.set_subsystem = pci_dev_set_subsystem,
};
static void lpc_init(device_t dev)
static void lpc_init(struct device *dev)
{
printk(BIOS_DEBUG, "SB800 - Late.c - lpc_init - Start.\n");
@ -344,7 +344,7 @@ BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, set_pci_irqs, NULL);
/**
* @brief SB Cimx entry point sbBeforePciInit wrapper
*/
static void sb800_enable(device_t dev)
static void sb800_enable(struct device *dev)
{
struct southbridge_amd_cimx_sb800_config *sb_chip =
(struct southbridge_amd_cimx_sb800_config *)(dev->chip_info);
@ -427,7 +427,7 @@ static void sb800_enable(device_t dev)
case (0x15 << 3) | 0: /* 0:15:0 PCIe PortA */
{
device_t device;
struct device *device;
for (device = dev; device; device = device->sibling) {
if ((device->path.pci.devfn & ~3) != PCI_DEVFN(0x15,0)) break;
sb_config->PORTCONFIG[device->path.pci.devfn & 3].PortCfg.PortPresent = device->enabled;

6
src/southbridge/amd/cimx/sb800/lpc.c
View File

@ -22,7 +22,7 @@
#include <arch/io.h>
#include <cbmem.h>
void lpc_read_resources(device_t dev)
void lpc_read_resources(struct device *dev)
{
struct resource *res;
@ -76,7 +76,7 @@ void lpc_set_resources(struct device *dev)
* @param dev the device whose children's resources are to be enabled
*
*/
void lpc_enable_childrens_resources(device_t dev)
void lpc_enable_childrens_resources(struct device *dev)
{
struct bus *link;
u32 reg, reg_x;
@ -88,7 +88,7 @@ void lpc_enable_childrens_resources(device_t dev)
reg_x = pci_read_config32(dev, 0x48);
for (link = dev->link_list; link; link = link->next) {
device_t child;
struct device *child;
for (child = link->children; child;
child = child->sibling) {
if (child->enabled

6
src/southbridge/amd/cimx/sb800/lpc.h
View File

@ -21,8 +21,8 @@
#define SPI_ROM_ENABLE 0x02
#define SPI_BASE_ADDRESS 0xFEC10000
void lpc_read_resources(device_t dev);
void lpc_set_resources(device_t dev);
void lpc_enable_childrens_resources(device_t dev);
void lpc_read_resources(struct device *dev);
void lpc_set_resources(struct device *dev);
void lpc_enable_childrens_resources(struct device *dev);
#endif

2
src/southbridge/amd/cimx/sb800/spi.c
View File

@ -48,7 +48,7 @@ static void execute_command(void)
void spi_init()
{
device_t dev;
struct device *dev;
dev = dev_find_slot(0, PCI_DEVFN(0x14, 3));
spibar = pci_read_config32(dev, 0xA0) & ~0x1F;