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mb/supermicro/x11-lga1151-series: enable SLP_S0 as vendor does 

This enables SLP_S0 for x11 boards.

Change-Id: I7240ed631bf72b1d3c9ea887da43772781c80b45
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36141
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Michael Niewöhner 2019-10-20 00:01:58 +02:00 committed by Patrick Georgi
parent 7398c95d9c
commit 1b79b86def
1 changed files with 2 additions and 1 deletions
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src/mainboard/supermicro/x11-lga1151-series/devicetree.cb
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@ -92,7 +92,8 @@ chip soc/intel/skylake
# LPC # LPC
register "serirq_mode" = "SERIRQ_CONTINUOUS" register "serirq_mode" = "SERIRQ_CONTINUOUS"
# Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch # Enabling SLP_S0, SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch
register "s0ix_enable" = "1"
register "PmConfigSlpS3MinAssert" = "SLP_S3_MIN_ASSERT_50MS" register "PmConfigSlpS3MinAssert" = "SLP_S3_MIN_ASSERT_50MS"
register "PmConfigSlpS4MinAssert" = "SLP_S4_MIN_ASSERT_4S" register "PmConfigSlpS4MinAssert" = "SLP_S4_MIN_ASSERT_4S"
register "PmConfigSlpSusMinAssert" = "SLP_SUS_MIN_ASSERT_4S" register "PmConfigSlpSusMinAssert" = "SLP_SUS_MIN_ASSERT_4S"