sb/amd/sr5650: Fix invalid function declarations

Change-Id: I5034debc2296352e698898c20910a2d76071e30a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26775
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

src/mainboard/asus/kcma-d8/mainboard.c

@@ -24,10 +24,6 @@
 #include <southbridge/amd/sb700/sb700.h>
 #include <southbridge/amd/sr5650/cmn.h>
 
-
-void set_pcie_reset(void);
-void set_pcie_dereset(void);
-
 void set_pcie_reset(void)
 {
 	struct device *pcie_core_dev;

src/mainboard/asus/kgpe-d16/mainboard.c

@@ -24,10 +24,6 @@
 #include <southbridge/amd/sb700/sb700.h>
 #include <southbridge/amd/sr5650/cmn.h>
 
-
-void set_pcie_reset(void);
-void set_pcie_dereset(void);
-
 void set_pcie_reset(void)
 {
 	struct device *pcie_core_dev;

src/mainboard/supermicro/h8scm_fam10/mainboard.c

@@ -23,10 +23,6 @@
 #include <southbridge/amd/sb700/sb700.h>
 #include <southbridge/amd/sr5650/cmn.h>
 
-
-void set_pcie_reset(void);
-void set_pcie_dereset(void);
-
 /*
  * TODO: Add the routine info of each PCIE_RESET_L.
  * TODO: Add the reset of each PCIE_RESET_L.

src/southbridge/amd/sr5650/cmn.h

@@ -146,4 +146,8 @@ static inline void set_pcie_enable_bits(device_t dev, u32 reg_pos, u32 mask, u32
 		nb_write_index(dev, NBPCIE_INDEX, reg_pos, reg);
 	}
 }
+
+void set_pcie_reset(void);
+void set_pcie_dereset(void);
+
 #endif /* __SR5650_CMN_H__ */

src/southbridge/amd/sr5650/sr5650.c

@@ -32,9 +32,6 @@
 /*
  * extern function declaration
  */
-extern void set_pcie_dereset(void);
-extern void set_pcie_reset(void);
-
 struct resource * sr5650_retrieve_cpu_mmio_resource() {
 	struct device *domain;
 	struct resource *res;