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vc/amd/pi/amdlib.c: Use native coreboot code over compiler builtins 

Compiler builtins depend on certain CPU features flags to be passed to
the compiler. This may have unwanted side effects as generating code
with FPU registers. Instead use native coreboot code.

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I4e92d103fa3a6c7a56e813a583b3262676969669
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75321
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Arthur Heymans 2023-05-18 10:56:10 +02:00 committed by Felix Held
parent 9d475bf6de
commit 1e45295236
2 changed files with 4 additions and 3 deletions
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6
src/vendorcode/amd/pi/Lib/amdlib.c
View File

@ -45,6 +45,8 @@
#include <AGESA.h> #include <AGESA.h>
#include <cpuRegisters.h> #include <cpuRegisters.h>
#include <cpu/x86/mp.h>
#include <cpu/x86/cache.h>
#include <Filecode.h> #include <Filecode.h>
#include <Ids.h> #include <Ids.h>
#include <Porting.h> #include <Porting.h>
@ -488,8 +490,8 @@ LibAmdCLFlush (
address32 = 0; address32 = 0;
hwcrSave = SetFsBase (Address); hwcrSave = SetFsBase (Address);
for (Index = 0; Index < Count; Index++){ for (Index = 0; Index < Count; Index++){
_mm_mfence (); mfence();
_mm_clflush_fs (&address32 [Index * 64]); clflush(&address32 [Index * 64]);
} }
RestoreHwcr (hwcrSave); RestoreHwcr (hwcrSave);
} }

1
src/vendorcode/amd/pi/Makefile.inc
View File

@ -88,7 +88,6 @@ AGESA_INC += -I$(src)/commonlib/include
AGESA_INC += -I$(src)/commonlib/bsd/include AGESA_INC += -I$(src)/commonlib/bsd/include
AGESA_INC += -I$(VBOOT_SOURCE)/firmware/include AGESA_INC += -I$(VBOOT_SOURCE)/firmware/include
AGESA_CFLAGS += -march=amdfam10 -mno-3dnow
AGESA_CFLAGS += -Wno-pragma-pack AGESA_CFLAGS += -Wno-pragma-pack
AGESA_CFLAGS += -fno-strict-aliasing -D__LIBAGESA__ AGESA_CFLAGS += -fno-strict-aliasing -D__LIBAGESA__
CFLAGS_x86_32 += $(AGESA_CFLAGS) CFLAGS_x86_32 += $(AGESA_CFLAGS)