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mb/system76/lemp9: Relocate device enable options 

Built with BUILD_TIMELESS=1, resulting coreboot.rom does not change.

Change-Id: I655bc7576e8ff48258a2a19387e01372f4bbea3d
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43920
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner
This commit is contained in:
Felix Singer 2020-07-26 21:02:33 +02:00 committed by Michael Niewöhner
parent abe549cac7
commit 1f10db2828
1 changed files with 9 additions and 6 deletions
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15
src/mainboard/system76/lemp9/devicetree.cb
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@ -129,9 +129,6 @@ chip soc/intel/cannonlake
register "PcieClkSrcClkReq[5]" = "5" register "PcieClkSrcClkReq[5]" = "5"
# Misc # Misc
register "Device4Enable" = "0"
register "HeciEnabled" = "0"
register "Heci3Enabled" = "0"
register "AcousticNoiseMitigation" = "1" register "AcousticNoiseMitigation" = "1"
#register "dmipwroptimize" = "1" #register "dmipwroptimize" = "1"
#register "satapwroptimize" = "1" #register "satapwroptimize" = "1"
@ -182,7 +179,9 @@ chip soc/intel/cannonlake
device domain 0 on device domain 0 on
device pci 00.0 on end # Host Bridge device pci 00.0 on end # Host Bridge
device pci 02.0 on end # Integrated Graphics Device device pci 02.0 on end # Integrated Graphics Device
device pci 04.0 off end # SA Thermal device device pci 04.0 off # SA Thermal device
register "Device4Enable" = "0"
end
device pci 12.0 on end # Thermal Subsystem device pci 12.0 on end # Thermal Subsystem
device pci 12.5 off end # UFS SCS device pci 12.5 off end # UFS SCS
device pci 12.6 off end # GSPI #2 device pci 12.6 off end # GSPI #2
@ -198,11 +197,15 @@ chip soc/intel/cannonlake
device pci 15.1 off end # I2C #1 device pci 15.1 off end # I2C #1
device pci 15.2 off end # I2C #2 device pci 15.2 off end # I2C #2
device pci 15.3 off end # I2C #3 device pci 15.3 off end # I2C #3
device pci 16.0 off end # Management Engine Interface 1 device pci 16.0 off # Management Engine Interface 1
register "HeciEnabled" = "0"
end
device pci 16.1 off end # Management Engine Interface 2 device pci 16.1 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device pci 16.2 off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT Redirection device pci 16.3 off end # Management Engine KT Redirection
device pci 16.4 off end # Management Engine Interface 3 device pci 16.4 off # Management Engine Interface 3
register "Heci3Enabled" = "0"
end
device pci 16.5 off end # Management Engine Interface 4 device pci 16.5 off end # Management Engine Interface 4
device pci 17.0 on end # SATA device pci 17.0 on end # SATA
device pci 19.0 off end # I2C #4 device pci 19.0 off end # I2C #4