soc/amd/picasso: Change SOC_AMD_STONEY* to SOC_AMD_PICASSO
TEST=None BUG=b:130804851 Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: Ie466bc39ed6aa9d2a8651bd9290090b83cd97d74 Reviewed-on: https://review.coreboot.org/c/coreboot/+/32410 Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -13,17 +13,12 @@
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## GNU General Public License for more details.
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##
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config SOC_AMD_STONEYRIDGE_FP4
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config SOC_AMD_PICASSO
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bool
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help
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AMD Stoney Ridge FP4 support
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AMD Picasso support
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config SOC_AMD_STONEYRIDGE_FT4
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bool
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help
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AMD Stoney Ridge FT4 support
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if SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4
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if SOC_AMD_PICASSO
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config CPU_SPECIFIC_OPTIONS
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def_bool y
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@ -386,4 +381,4 @@ config MAINBOARD_POWER_RESTORE
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return to S0. Otherwise the system will remain in S5 once power
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is restored.
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endif # SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4
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endif # SOC_AMD_PICASSO
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@ -27,7 +27,7 @@
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# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#*****************************************************************************
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ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y)
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ifeq ($(CONFIG_SOC_AMD_PICASSO),y)
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subdirs-y += ../../../cpu/amd/mtrr/
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subdirs-y += ../../../cpu/x86/tsc
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@ -300,4 +300,4 @@ endif
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endif # ifeq ($(CONFIG_SOC_AMD_PSP_SELECTABLE_SMU_FW),y)
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endif # ($(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y)
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endif # ($(CONFIG_SOC_AMD_PICASSO),y)
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