soc/amd/picasso: Change SOC_AMD_STONEY* to SOC_AMD_PICASSO

TEST=None
BUG=b:130804851

Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: Ie466bc39ed6aa9d2a8651bd9290090b83cd97d74
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32410
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Martin Roth 2019-04-22 16:08:31 -06:00 committed by Martin Roth
parent 5f672636d6
commit 1f33762d77
2 changed files with 6 additions and 11 deletions

View File

@ -13,17 +13,12 @@
## GNU General Public License for more details.
##
config SOC_AMD_STONEYRIDGE_FP4
config SOC_AMD_PICASSO
bool
help
AMD Stoney Ridge FP4 support
AMD Picasso support
config SOC_AMD_STONEYRIDGE_FT4
bool
help
AMD Stoney Ridge FT4 support
if SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4
if SOC_AMD_PICASSO
config CPU_SPECIFIC_OPTIONS
def_bool y
@ -386,4 +381,4 @@ config MAINBOARD_POWER_RESTORE
return to S0. Otherwise the system will remain in S5 once power
is restored.
endif # SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4
endif # SOC_AMD_PICASSO

View File

@ -27,7 +27,7 @@
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#*****************************************************************************
ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y)
ifeq ($(CONFIG_SOC_AMD_PICASSO),y)
subdirs-y += ../../../cpu/amd/mtrr/
subdirs-y += ../../../cpu/x86/tsc
@ -300,4 +300,4 @@ endif
endif # ifeq ($(CONFIG_SOC_AMD_PSP_SELECTABLE_SMU_FW),y)
endif # ($(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y)
endif # ($(CONFIG_SOC_AMD_PICASSO),y)