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soc/intel/common/pch: Select Kconfig for ITSS polarity configuration 

This patch selects Kconfig for Intel Core Platform in order to ensure
proper ITSS IPCx programming.

Change-Id: I81e75e17ceb23c364b78300c3950144be1580700
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/28790
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Subrata Banik 2018-09-28 19:49:43 +05:30 committed by Duncan Laurie
parent 3087bf5283
commit 1f33a0c799
2 changed files with 5 additions and 2 deletions
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6
src/soc/intel/common/block/gpio/Kconfig
View File

@ -10,8 +10,10 @@ config DEBUG_SOC_COMMON_BLOCK_GPIO
help
This option enables GPIO debug messages
# Used in small core SOCs to invert the polarity as ITSS only takes
# active high signals
# Use to program Interrupt Polarity Control (IPCx) register
# Each bit represents IRQx Active High Polarity Disable configuration:
# when set to 1, the interrupt polarity associated with IRQx is inverted
# to appear as Active Low to IOAPIC and vice versa
config SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG
depends on SOC_INTEL_COMMON_BLOCK_GPIO
bool

1
src/soc/intel/common/pch/Kconfig
View File

@ -23,6 +23,7 @@ config PCH_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_EBDA
select SOC_INTEL_COMMON_BLOCK_FAST_SPI
select SOC_INTEL_COMMON_BLOCK_GPIO
select SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG
select SOC_INTEL_COMMON_BLOCK_GRAPHICS
select SOC_INTEL_COMMON_BLOCK_ITSS
select SOC_INTEL_COMMON_BLOCK_I2C