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mb/google/brya/var/mithrax: Update DPTF parameters for Mithrax 

Follow thermal table from thermal team.

Chang list:
1. Update TEMP_PCT of Active Policy for TSR1.

BUG=b:230829301
TEST=emerge-brya coreboot

Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Change-Id: I2a3fbdbe0dbb00597d5785c90c6e4d6ace54f13c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64856
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
John Su 2022-06-01 17:17:09 +08:00 committed by Paul Fagerburg
parent f0604afa02
commit 1f52edb093
1 changed files with 5 additions and 5 deletions
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10
src/mainboard/google/brya/variants/mithrax/overridetree.cb
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@ -99,11 +99,11 @@ chip soc/intel/alderlake
.target = DPTF_TEMP_SENSOR_1, .target = DPTF_TEMP_SENSOR_1,
.thresholds = { .thresholds = {
TEMP_PCT(48, 76), TEMP_PCT(48, 76),
TEMP_PCT(45, 65), TEMP_PCT(40, 66),
TEMP_PCT(42, 53), TEMP_PCT(38, 53),
TEMP_PCT(39, 45), TEMP_PCT(36, 43),
TEMP_PCT(36, 39), TEMP_PCT(34, 39),
TEMP_PCT(33, 34), TEMP_PCT(32, 33),
} }
} }
}" }"