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siemens/sitemp_g1p1: Make ACPI report the right mmconf region 

ACPI reported the entire space between top-of-memory and some
(relatively) arbitrary limit as useful for MMIO. Unfortunately
the HyperTransport configuration disagreed. Make them match up.

Other boards are not affected since they don't report any region
for that purpose at all (it seems).

Change-Id: I432a679481fd1c271f14ecd6fe74f0b7a15a698e
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/3047
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Patrick Georgi 2013-04-09 15:41:23 +02:00 committed by Ronald G. Minnich
parent 7576f2515e
commit 1fde22c54c
4 changed files with 14 additions and 5 deletions
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2
src/include/cpu/amd/amdk8_sysconf.h
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@ -21,6 +21,8 @@ struct amdk8_sysconf_t {
void *mb; // pointer for mb releated struct void *mb; // pointer for mb releated struct
unsigned mmconf_start;
unsigned mmconf_end;
}; };
extern struct amdk8_sysconf_t sysconf; extern struct amdk8_sysconf_t sysconf;

10
src/mainboard/siemens/sitemp_g1p1/dsdt.asl
View File

@ -255,8 +255,6 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "SIEMENS", "SITEMP ", 0x20101005)
MPEN, 8 MPEN, 8
} }
Name (IOLM,0xe0000000)
#include "acpi/platform.asl" #include "acpi/platform.asl"
Scope(\_SB) { Scope(\_SB) {
@ -385,6 +383,8 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "SIEMENS", "SITEMP ", 0x20101005)
External (MMIO) External (MMIO)
External (TOM1) External (TOM1)
External (TOM2) External (TOM2)
External (MMCB) /* MMConf Begin */
External (MMCE) /* MMConf End */
Name(_HID, EISAID("PNP0A03")) Name(_HID, EISAID("PNP0A03"))
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
@ -1186,9 +1186,9 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "SIEMENS", "SITEMP ", 0x20101005)
CreateDWordField(CRES, ^EMM2._MAX, EM2E) CreateDWordField(CRES, ^EMM2._MAX, EM2E)
CreateDWordField(CRES, ^EMM2._LEN, EM2L) CreateDWordField(CRES, ^EMM2._LEN, EM2L)
Store(TOM1, EM2B) Store(MMCB, EM2B)
Subtract(IOLM, 1, EM2E) Subtract(MMCE, 1, EM2E)
Subtract(IOLM, TOM1, EM2L) Subtract(MMCE, MMCB, EM2L)
If(LGreater(LOMH, 0xC0000)){ If(LGreater(LOMH, 0xC0000)){
Store(0xC0000, EM1B) /* Hole above C0000 and below E0000 */ Store(0xC0000, EM1B) /* Hole above C0000 and below E0000 */

4
src/northbridge/amd/amdk8/acpi.c
View File

@ -280,6 +280,10 @@ int k8acpi_write_vars(void)
*/ */
lens += acpigen_write_name_dword("TOM2", (msr.hi << 12) | msr.lo >> 20); lens += acpigen_write_name_dword("TOM2", (msr.hi << 12) | msr.lo >> 20);
/* MMConf area for PCI0, begin and end */
lens += acpigen_write_name_dword("MMCB", sysconf.mmconf_start);
lens += acpigen_write_name_dword("MMCE", sysconf.mmconf_end);
lens += k8acpi_write_HT(); lens += k8acpi_write_HT();
//minus opcode //minus opcode
acpigen_patch_len(lens - 1); acpigen_patch_len(lens - 1);

3
src/northbridge/amd/amdk8/northbridge.c
View File

@ -561,6 +561,9 @@ static void amdk8_set_resources(device_t dev)
amdk8_set_resource(dev, res, nodeid); amdk8_set_resource(dev, res, nodeid);
} }
sysconf.mmconf_start = mem_lowest_start;
sysconf.mmconf_end = mem_highest_end;
compact_resources(dev); compact_resources(dev);
for(bus = dev->link_list; bus; bus = bus->next) { for(bus = dev->link_list; bus; bus = bus->next) {