mb/google/rex/variants/baseboard/rex: Add CPU power limit values

Add support of variant_devtree_update() function to override
devtree settings for variant boards. Also, add CPU power limit
values for rex baseboard.

BRANCH=None
BUG=b:270664854
TEST=Built and verified power limit values as below log message
      for 15W SKU on Rex board.
     Overriding power limits PL1 (mW) (10000, 15000) PL2 (mW)
      (57000, 57000) PL4 (W) (114)

Change-Id: If46445157358e3e0f227e26a35b4303fc9189a4b
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74754
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Harsha B R <harsha.b.r@intel.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>

src/mainboard/google/rex/Kconfig

@@ -25,6 +25,7 @@ config BOARD_GOOGLE_REX_COMMON
 	select MAINBOARD_DISABLE_STAGE_CACHE
 	select MAINBOARD_HAS_TPM2
 	select PMC_IPC_ACPI_INTERFACE
+	select SOC_INTEL_COMMON_BLOCK_VARIANT_POWER_LIMIT
 	select SOC_INTEL_CSE_LITE_SKU
 	select SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY_V2
 	select SOC_INTEL_CSE_SEND_EOP_ASYNC

src/mainboard/google/rex/mainboard.c

@@ -41,6 +41,12 @@ static void mainboard_init(void *chip_info)
 	fw_config_gpio_padbased_override(padbased_table);
 	gpio_configure_pads_with_padbased(padbased_table);
 	free(padbased_table);
+	variant_devtree_update();
+}
+
+void __weak variant_devtree_update(void)
+{
+	/* Override dev tree settings per board */
 }
 
 void __weak variant_generate_s0ix_hook(enum s0ix_entry entry)

src/mainboard/google/rex/variants/baseboard/include/baseboard/variants.h

@@ -31,4 +31,7 @@ enum s0ix_entry {
 
 void variant_generate_s0ix_hook(enum s0ix_entry entry);
 
+/* Modify devictree settings during ramstage */
+void variant_devtree_update(void);
+
 #endif /*__BASEBOARD_VARIANTS_H__ */

src/mainboard/google/rex/variants/baseboard/rex/Makefile.inc

@@ -1 +1,3 @@
 romstage-y += memory.c
+
+ramstage-y += ramstage.c

src/mainboard/google/rex/variants/baseboard/rex/ramstage.c

@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/variants.h>
+#include <device/pci_ids.h>
+#include <intelblocks/power_limit.h>
+
+/*
+ * SKU_ID, TDP (Watts), pl1_min (milliWatts), pl1_max (milliWatts),
+ * pl2_min (milliWatts), pl2_max (milliWatts), pl4 (milliWatts)
+ * Following values are for performance config as per document #640982
+ */
+const struct cpu_tdp_power_limits limits[] = {
+	{
+		.mch_id = PCI_DID_INTEL_MTL_P_ID_2,
+		.cpu_tdp = 15,
+		.pl1_min_power = 10000,
+		.pl1_max_power = 15000,
+		.pl2_min_power = 57000,
+		.pl2_max_power = 57000,
+		.pl4_power = 114000
+	},
+};
+
+void variant_devtree_update(void)
+{
+	size_t total_entries = ARRAY_SIZE(limits);
+	variant_update_cpu_power_limits(limits, total_entries);
+}