soc/amd/common/psp_verstage: Add PSP_VERSTACK_STACK_IS_MAPPED config
Crypto Engine in PSP prefers the buffer from Static RAM (SRAM). Hence if a buffer comes from within SRAM address range, then it is passed directly to Crypto Engine. Otherwise a bounce bufer from the stack is used. But on SoCs like Picasso where PSP Verstage stack is mapped to a virtual address space this check fails causing a bounce buffer to be used and hence a stack overflow. Fix this issue by assuming that the buffer comes from the SRAM always in such SoCs and pass the buffer directly to crypto engine. BUG=b:259649666 TEST=Build and boot to OS in Dalboz with unsigned PSP verstage. Change-Id: I2161c8f0720c770efa5c05aece9584c3cbe7712a Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78426 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
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@ -35,3 +35,11 @@ config SEPARATE_SIGNED_PSPFW
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help
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Put signed AMD/PSP firmwares outside FW_MAIN_[AB] so vboot doesn't verify them,
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and rely on PSP's verification.
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config PSP_VERSTAGE_STACK_IS_MAPPED
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bool
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default y if SOC_AMD_PICASSO
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default n
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help
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This configuration indicates whether the PSP Verstage stack is mapped to a virtual
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address space. This has been the case so far only in Picasso SoC.
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@ -90,8 +90,11 @@ vb2_error_t vb2ex_hwcrypto_digest_extend(const uint8_t *buf, uint32_t size)
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* mapped address of SPI flash which makes crypto engine to return invalid address.
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* Hence if the buffer is from SRAM, pass it to crypto engine. Else copy into a
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* temporary buffer before passing it to crypto engine.
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*
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* Similarly in some SoCs, PSP verstage stack is mapped to a virtual address space.
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* In those SoCs, assume that the buffer is from SRAM and pass it to crypto engine.
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*/
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if (buf >= _sram && (buf + size) < _esram)
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if (CONFIG(PSP_VERSTAGE_STACK_IS_MAPPED) || (buf >= _sram && (buf + size) < _esram))
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return vb2ex_hwcrypto_digest_extend_psp_sram(buf, size);
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while (size) {
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