drivers/spi: Add support for generating SPI device in SSDT
Similar to I2C driver, add support for generating SPI device and required properties in SSDT for ACPI. BUG=chrome-os-partner:59832 BRANCH=None TEST=Compiles succesfully. Verified SPI device generated in SSDT on poppy. Change-Id: Ic4da79c823131d54d9eb3652b86f6e40fe643ab5 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/18342 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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#
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# This file is part of the coreboot project.
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#
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# Copyright 2017 Google Inc.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; version 2 of the License.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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config DRIVERS_SPI_ACPI
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bool
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depends on HAVE_ACPI_TABLES
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#
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# This file is part of the coreboot project.
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#
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# Copyright 2017 Google Inc.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; version 2 of the License.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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ramstage-$(CONFIG_DRIVERS_SPI_ACPI) += acpi.c
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2017 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/acpi_device.h>
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#include <arch/acpigen.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <device/path.h>
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#include <device/spi.h>
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#include <spi-generic.h>
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#include <stdint.h>
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#include <string.h>
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#include "chip.h"
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static int spi_acpi_get_bus(struct device *dev)
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{
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struct device *spi_dev;
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struct device_operations *ops;
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if (!dev->bus || !dev->bus->dev)
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return -1;
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spi_dev = dev->bus->dev;
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ops = spi_dev->ops;
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if (ops && ops->ops_spi_bus &&
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ops->ops_spi_bus->dev_to_bus)
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return ops->ops_spi_bus->dev_to_bus(spi_dev);
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return -1;
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}
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static void spi_acpi_fill_ssdt_generator(struct device *dev)
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{
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struct drivers_spi_acpi_config *config = dev->chip_info;
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const char *scope = acpi_device_scope(dev);
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struct spi_cfg spi_cfg;
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struct spi_slave slave;
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int bus = -1, cs = dev->path.spi.cs;
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struct acpi_spi spi = {
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.device_select = cs,
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.speed = config->speed ? : 1 * MHz,
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.resource = scope,
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};
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if (!dev->enabled || !scope)
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return;
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bus = spi_acpi_get_bus(dev);
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if (bus == -1) {
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printk(BIOS_ERR, "%s: ERROR: Cannot get bus for device.\n",
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dev_path(dev));
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return;
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}
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if (!config->hid) {
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printk(BIOS_ERR, "%s: ERROR: HID required.\n", dev_path(dev));
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return;
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}
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if (spi_setup_slave(bus, cs, &slave)) {
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printk(BIOS_ERR, "%s: ERROR: SPI setup failed.\n",
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dev_path(dev));
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return;
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}
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if (spi_get_config(&slave, &spi_cfg)) {
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printk(BIOS_ERR, "%s: ERROR: SPI get config failed.\n",
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dev_path(dev));
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return;
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}
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spi.device_select_polarity = spi_cfg.cs_polarity;
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spi.wire_mode = spi_cfg.wire_mode;
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spi.data_bit_length = spi_cfg.data_bit_length;
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spi.clock_phase = spi_cfg.clk_phase;
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/* Device */
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acpigen_write_scope(scope);
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acpigen_write_device(acpi_device_name(dev));
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acpigen_write_name_string("_HID", config->hid);
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if (config->cid)
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acpigen_write_name_string("_CID", config->cid);
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acpigen_write_name_integer("_UID", config->uid);
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if (config->desc)
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acpigen_write_name_string("_DDN", config->desc);
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/* Resources */
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acpigen_write_name("_CRS");
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acpigen_write_resourcetemplate_header();
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acpi_device_write_spi(&spi);
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acpi_device_write_interrupt(&config->irq);
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acpigen_write_resourcetemplate_footer();
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if (config->compat_string) {
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struct acpi_dp *dsd = acpi_dp_new_table("_DSD");
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acpi_dp_add_string(dsd, "compatible", config->compat_string);
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acpi_dp_write(dsd);
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}
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acpigen_pop_len(); /* Device */
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acpigen_pop_len(); /* Scope */
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}
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static const char *spi_acpi_name(struct device *dev)
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{
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struct drivers_spi_acpi_config *config = dev->chip_info;
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static char name[5];
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if (config->name)
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return config->name;
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snprintf(name, sizeof(name), "S%03.3X", spi_acpi_get_bus(dev));
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name[4] = '\0';
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return name;
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}
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static struct device_operations spi_acpi_ops = {
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.read_resources = DEVICE_NOOP,
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.set_resources = DEVICE_NOOP,
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.enable_resources = DEVICE_NOOP,
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.acpi_name = &spi_acpi_name,
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.acpi_fill_ssdt_generator = &spi_acpi_fill_ssdt_generator,
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};
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static void spi_acpi_enable(struct device *dev)
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{
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dev->ops = &spi_acpi_ops;
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}
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struct chip_operations drivers_spi_acpi_ops = {
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CHIP_NAME("SPI Device")
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.enable_dev = &spi_acpi_enable
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};
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2017 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __SPI_ACPI_CHIP_H__
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#define __SPI_ACPI_CHIP_H__
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#include <arch/acpi_device.h>
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struct drivers_spi_acpi_config {
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const char *hid; /* ACPI _HID (required) */
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const char *cid; /* ACPI _CID */
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const char *name; /* ACPI Device Name */
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const char *desc; /* Device Description */
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unsigned uid; /* ACPI _UID */
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unsigned speed; /* Bus speed in Hz (default 1MHz) */
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const char *compat_string; /* Compatible string for _HID=PRP0001 */
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struct acpi_irq irq; /* Interrupt */
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};
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#endif /* __SPI_ACPI_CHIP_H__ */
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