mb/prodrive/hermes: Improve board config EEPROM handling
* Check and print errors returned from reading from I2C * Rework offset calculation by using more macros * Get rid of stage-specific preprocessor code * Define the EEPROM layout as struct * Make use of the defined EEPROM layout to calculate offsets * Read the UPD to disable VT-d from EEPROM Change-Id: Iad77811318c7dfd3a3a4f8d523cfa0f457f168b6 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48808 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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4 changed files with 56 additions and 49 deletions
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@ -11,8 +11,6 @@
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#define I2C_ADDR_EEPROM 0x57
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#define EEPROM_OFFSET_BOARD_SETTINGS 0x1f00
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/*
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* Check Signature in EEPROM (M24C32-FMN6TP)
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* If signature is there we assume that that the content is valid
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@ -39,7 +37,9 @@ int check_signature(const size_t offset, const uint64_t signature)
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*/
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static bool get_board_settings_from_eeprom(struct eeprom_board_settings *board_cfg)
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{
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if (read_write_config(board_cfg, EEPROM_OFFSET_BOARD_SETTINGS, 0, sizeof(*board_cfg))) {
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const size_t board_settings_offset = offsetof(struct eeprom_layout, BoardSettings);
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if (read_write_config(board_cfg, board_settings_offset, 0, sizeof(*board_cfg))) {
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printk(BIOS_ERR, "CFG EEPROM: Failed to read board settings\n");
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return false;
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}
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@ -101,3 +101,8 @@ bool read_write_config(void *blob, size_t read_offset, size_t write_offset, size
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return ret;
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}
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void report_eeprom_error(const size_t off)
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{
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printk(BIOS_ERR, "MB: Failed to read from EEPROM at addr. 0x%zx\n", off);
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}
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@ -4,10 +4,6 @@
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#include <variant/gpio.h>
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#include "variants/baseboard/include/eeprom.h"
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static fsp_params parmas_list[] = {
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/* FIXME: Fill with additional options */
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};
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void mainboard_silicon_init_params(FSPS_UPD *supd)
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{
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FSP_S_CONFIG *params = &supd->FspsConfig;
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@ -19,15 +15,9 @@ void mainboard_silicon_init_params(FSPS_UPD *supd)
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params->SataLedEnable = 1;
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/* Overwrite params */
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if (!check_signature(EEPROM_OFFSET_FSP_SIGNATURE, FSP_UPD_SIGNATURE))
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if (!check_signature(offsetof(struct eeprom_layout, supd), FSPS_UPD_SIGNATURE))
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return;
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for (u8 i = 0; i <= ARRAY_SIZE(parmas_list); i++) {
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if (ARRAY_SIZE(parmas_list) == 0)
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break;
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read_write_config(params, EEPROM_OFFSET_FSP_CONFIG +
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parmas_list[i].offset,
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EEPROM_OFFSET_FSP_CONFIG + parmas_list[i].offset,
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parmas_list[i].size);
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}
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READ_EEPROM_FSP_S(supd, FspsTestConfig.VtdDisableDeprecated);
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READ_EEPROM_FSP_S(supd, FspsConfig.PchPmWolEnableOverride);
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}
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@ -5,12 +5,6 @@
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#include <variant/variants.h>
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#include "variants/baseboard/include/eeprom.h"
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static fsp_params parmas_list[] = {
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GET_VALUE(RMT),
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GET_VALUE(HyperThreading),
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GET_VALUE(BootFrequency)
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};
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void mainboard_memory_init_params(FSPM_UPD *memupd)
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{
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memupd->FspmConfig.UserBd = 7;
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@ -19,13 +13,11 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
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cannonlake_memcfg_init(&memupd->FspmConfig, variant_memcfg_config());
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/* Overwrite memupd */
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if (!check_signature(EEPROM_OFFSET_FSP_SIGNATURE, FSP_UPD_SIGNATURE))
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if (!check_signature(offsetof(struct eeprom_layout, mupd), FSPM_UPD_SIGNATURE))
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return;
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for (size_t i = 0; i < ARRAY_SIZE(parmas_list); i++) {
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read_write_config(memupd, EEPROM_OFFSET_FSP_CONFIG +
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parmas_list[i].offset,
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EEPROM_OFFSET_FSP_CONFIG + parmas_list[i].offset,
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parmas_list[i].size);
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}
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READ_EEPROM_FSP_M(memupd, FspmConfig.RMT);
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READ_EEPROM_FSP_M(memupd, FspmConfig.HyperThreading);
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READ_EEPROM_FSP_M(memupd, FspmConfig.BootFrequency);
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READ_EEPROM_FSP_M(memupd, FspmTestConfig.VtdDisable);
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}
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@ -2,22 +2,6 @@
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#include <soc/ramstage.h>
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#if ENV_ROMSTAGE
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#define FSP_UPD_SIGNATURE FSPM_UPD_SIGNATURE
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#define EEPROM_OFFSET_FSP_SIGNATURE 0
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#define EEPROM_OFFSET_FSP_CONFIG 0
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#define GET_VALUE(x) {.offset = sizeof(FSP_UPD_HEADER) + sizeof(FSPM_ARCH_UPD) \
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+ offsetof(FSP_M_CONFIG, x), .size = member_size(FSP_M_CONFIG, x)}
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#else
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#define FSP_UPD_SIGNATURE FSPS_UPD_SIGNATURE
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#define EEPROM_OFFSET_FSP_SIGNATURE 0x0600
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#define EEPROM_OFFSET_FSP_CONFIG (EEPROM_OFFSET_FSP_SIGNATURE + sizeof(FSP_UPD_HEADER))
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#define GET_VALUE(x) {.offset = offsetof(FSP_S_CONFIG, x), \
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.size = member_size(FSP_S_CONFIG, x)}
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#endif /* ENV_ROMSTAGE */
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__packed struct eeprom_board_settings {
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uint32_t signature;
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union {
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@ -36,11 +20,47 @@ __packed struct eeprom_board_settings {
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};
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};
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typedef struct {
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size_t offset;
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size_t size;
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} fsp_params;
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/* The EEPROM on address 0x57 has the following vendor defined layout: */
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__packed struct eeprom_layout {
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union {
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uint8_t RawFSPMUPD[0x600];
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FSPM_UPD mupd;
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};
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union {
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uint8_t RawFSPSUPD[0xC00];
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FSPS_UPD supd;
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};
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uint8_t BoardLayout[0x400];
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uint8_t BootOrder[0x900];
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union {
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uint8_t RawBoardSetting[0x100];
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struct eeprom_board_settings BoardSettings;
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};
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};
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_Static_assert(sizeof(FSPM_UPD) <= 0x600, "FSPM_UPD too big");
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_Static_assert(sizeof(FSPS_UPD) <= 0xC00, "FSPS_UPD too big");
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_Static_assert(sizeof(struct eeprom_layout) == 0x2000, "EEPROM layout size mismatch");
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bool read_write_config(void *blob, size_t read_offset, size_t write_offset, size_t size);
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int check_signature(const size_t offset, const uint64_t signature);
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struct eeprom_board_settings *get_board_settings(void);
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void report_eeprom_error(const size_t off);
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#define READ_EEPROM(section_type, section_name, dest, opt_name) \
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do { \
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typeof(dest->opt_name) __tmp; \
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size_t __off = offsetof(struct eeprom_layout, section_name); \
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bool ret = read_write_config(&__tmp, \
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__off + offsetof(section_type, opt_name), \
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0, \
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sizeof(__tmp)); \
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if (ret) { \
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report_eeprom_error(__off + offsetof(section_type, opt_name)); \
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} else { \
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dest->opt_name = __tmp; \
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} \
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} while (0)
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#define READ_EEPROM_FSP_M(dest, opt_name) READ_EEPROM(FSPM_UPD, RawFSPMUPD, dest, opt_name)
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#define READ_EEPROM_FSP_S(dest, opt_name) READ_EEPROM(FSPS_UPD, RawFSPSUPD, dest, opt_name)
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