soc/intel/baytrail/southcluster.asl: Use consistent comment formatting

Change-Id: I479e1eb5819c42621e8b17367b964124d5433378
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48746
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
This commit is contained in:
Matt DeVillier 2020-12-18 19:33:46 -06:00 committed by Patrick Georgi
parent 6a7b707d11
commit 21a9bf81d8
1 changed files with 23 additions and 23 deletions

View File

@ -37,118 +37,118 @@ Name(_BBN, 0)
Name (MCRS, ResourceTemplate() Name (MCRS, ResourceTemplate()
{ {
// Bus Numbers /* Bus Numbers */
WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
0x0000, 0x0000, 0x00ff, 0x0000, 0x0100,,, PB00) 0x0000, 0x0000, 0x00ff, 0x0000, 0x0100,,, PB00)
// IO Region 0 /* IO Region 0 */
DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8,,, PI00) 0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8,,, PI00)
// PCI Config Space /* PCI Config Space */
Io (Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008) Io (Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008)
// IO Region 1 /* IO Region 1 */
DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
0x0000, 0x0d00, 0xffff, 0x0000, 0xf300,,, PI01) 0x0000, 0x0d00, 0xffff, 0x0000, 0xf300,,, PI01)
// VGA memory (0xa0000-0xbffff) /* VGA memory (0xa0000-0xbffff) */
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
Cacheable, ReadWrite, Cacheable, ReadWrite,
0x00000000, 0x000a0000, 0x000bffff, 0x00000000, 0x00000000, 0x000a0000, 0x000bffff, 0x00000000,
0x00020000,,, ASEG) 0x00020000,,, ASEG)
// OPROM reserved (0xc0000-0xc3fff) /* OPROM reserved (0xc0000-0xc3fff) */
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
Cacheable, ReadWrite, Cacheable, ReadWrite,
0x00000000, 0x000c0000, 0x000c3fff, 0x00000000, 0x00000000, 0x000c0000, 0x000c3fff, 0x00000000,
0x00004000,,, OPR0) 0x00004000,,, OPR0)
// OPROM reserved (0xc4000-0xc7fff) /* OPROM reserved (0xc4000-0xc7fff) */
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
Cacheable, ReadWrite, Cacheable, ReadWrite,
0x00000000, 0x000c4000, 0x000c7fff, 0x00000000, 0x00000000, 0x000c4000, 0x000c7fff, 0x00000000,
0x00004000,,, OPR1) 0x00004000,,, OPR1)
// OPROM reserved (0xc8000-0xcbfff) /* OPROM reserved (0xc8000-0xcbfff) */
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
Cacheable, ReadWrite, Cacheable, ReadWrite,
0x00000000, 0x000c8000, 0x000cbfff, 0x00000000, 0x00000000, 0x000c8000, 0x000cbfff, 0x00000000,
0x00004000,,, OPR2) 0x00004000,,, OPR2)
// OPROM reserved (0xcc000-0xcffff) /* OPROM reserved (0xcc000-0xcffff) */
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
Cacheable, ReadWrite, Cacheable, ReadWrite,
0x00000000, 0x000cc000, 0x000cffff, 0x00000000, 0x00000000, 0x000cc000, 0x000cffff, 0x00000000,
0x00004000,,, OPR3) 0x00004000,,, OPR3)
// OPROM reserved (0xd0000-0xd3fff) /* OPROM reserved (0xd0000-0xd3fff) */
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
Cacheable, ReadWrite, Cacheable, ReadWrite,
0x00000000, 0x000d0000, 0x000d3fff, 0x00000000, 0x00000000, 0x000d0000, 0x000d3fff, 0x00000000,
0x00004000,,, OPR4) 0x00004000,,, OPR4)
// OPROM reserved (0xd4000-0xd7fff) /* OPROM reserved (0xd4000-0xd7fff) */
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
Cacheable, ReadWrite, Cacheable, ReadWrite,
0x00000000, 0x000d4000, 0x000d7fff, 0x00000000, 0x00000000, 0x000d4000, 0x000d7fff, 0x00000000,
0x00004000,,, OPR5) 0x00004000,,, OPR5)
// OPROM reserved (0xd8000-0xdbfff) /* OPROM reserved (0xd8000-0xdbfff) */
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
Cacheable, ReadWrite, Cacheable, ReadWrite,
0x00000000, 0x000d8000, 0x000dbfff, 0x00000000, 0x00000000, 0x000d8000, 0x000dbfff, 0x00000000,
0x00004000,,, OPR6) 0x00004000,,, OPR6)
// OPROM reserved (0xdc000-0xdffff) /* OPROM reserved (0xdc000-0xdffff) */
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
Cacheable, ReadWrite, Cacheable, ReadWrite,
0x00000000, 0x000dc000, 0x000dffff, 0x00000000, 0x00000000, 0x000dc000, 0x000dffff, 0x00000000,
0x00004000,,, OPR7) 0x00004000,,, OPR7)
// BIOS Extension (0xe0000-0xe3fff) /* BIOS Extension (0xe0000-0xe3fff) */
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
Cacheable, ReadWrite, Cacheable, ReadWrite,
0x00000000, 0x000e0000, 0x000e3fff, 0x00000000, 0x00000000, 0x000e0000, 0x000e3fff, 0x00000000,
0x00004000,,, ESG0) 0x00004000,,, ESG0)
// BIOS Extension (0xe4000-0xe7fff) /* BIOS Extension (0xe4000-0xe7fff) */
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
Cacheable, ReadWrite, Cacheable, ReadWrite,
0x00000000, 0x000e4000, 0x000e7fff, 0x00000000, 0x00000000, 0x000e4000, 0x000e7fff, 0x00000000,
0x00004000,,, ESG1) 0x00004000,,, ESG1)
// BIOS Extension (0xe8000-0xebfff) /* BIOS Extension (0xe8000-0xebfff) */
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
Cacheable, ReadWrite, Cacheable, ReadWrite,
0x00000000, 0x000e8000, 0x000ebfff, 0x00000000, 0x00000000, 0x000e8000, 0x000ebfff, 0x00000000,
0x00004000,,, ESG2) 0x00004000,,, ESG2)
// BIOS Extension (0xec000-0xeffff) /* BIOS Extension (0xec000-0xeffff) */
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
Cacheable, ReadWrite, Cacheable, ReadWrite,
0x00000000, 0x000ec000, 0x000effff, 0x00000000, 0x00000000, 0x000ec000, 0x000effff, 0x00000000,
0x00004000,,, ESG3) 0x00004000,,, ESG3)
// System BIOS (0xf0000-0xfffff) /* System BIOS (0xf0000-0xfffff) */
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
Cacheable, ReadWrite, Cacheable, ReadWrite,
0x00000000, 0x000f0000, 0x000fffff, 0x00000000, 0x00000000, 0x000f0000, 0x000fffff, 0x00000000,
0x00010000,,, FSEG) 0x00010000,,, FSEG)
// LPEA Memory Region (0x20000000-0x201FFFFF) /* LPEA Memory Region (0x20000000-0x201FFFFF) */
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
Cacheable, ReadWrite, Cacheable, ReadWrite,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000,,, LMEM) 0x00000000,,, LMEM)
// PCI Memory Region (Top of memory-CONFIG_MMCONF_BASE_ADDRESS) /* PCI Memory Region (Top of memory-CONFIG_MMCONF_BASE_ADDRESS) */
DwordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, DwordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
Cacheable, ReadWrite, Cacheable, ReadWrite,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000,,, PMEM) 0x00000000,,, PMEM)
// TPM Area (0xfed40000-0xfed44fff) /* TPM Area (0xfed40000-0xfed44fff) */
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
Cacheable, ReadWrite, Cacheable, ReadWrite,
0x00000000, 0xfed40000, 0xfed44fff, 0x00000000, 0x00000000, 0xfed40000, 0xfed44fff, 0x00000000,
@ -259,7 +259,7 @@ Device (IOSF)
/* IRQ routing for each PCI device */ /* IRQ routing for each PCI device */
#include "irqroute.asl" #include "irqroute.asl"
// PCI Express Ports 0:1c.x /* PCI Express Ports 0:1c.x */
#include "pcie.asl" #include "pcie.asl"
Scope (\_SB) Scope (\_SB)
@ -276,7 +276,7 @@ Scope (\_SB.PCI0)
/* SCC Devices */ /* SCC Devices */
#include "scc.asl" #include "scc.asl"
// LPE Device /* LPE Device */
#include "lpe.asl" #include "lpe.asl"
} }