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mb/google/hatch/variants/kindred: Enable eMMC support 

Enable eMMC support for kindred.

Cq-Depend: chromium:1666982
BUG=b:135464155
BRANCH=none
TEST=Boot kindred onboard eMMC.

Change-Id: I040af6da30313f8dd59e3ef910b290922e090cdc
Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33618
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
David Wu 2019-06-19 20:09:17 +08:00 committed by Martin Roth
parent ebdafdb1a7
commit 21f1ccce9c
2 changed files with 28 additions and 0 deletions
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24
src/mainboard/google/hatch/variants/kindred/gpio.c
View File

@ -23,6 +23,30 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI(GPP_F3, NONE, PLTRST),
/* F10 : MEM_STRAP_2 */
PAD_CFG_GPI(GPP_F10, NONE, PLTRST),
/* F11 : EMMC_CMD ==> EMMC_CMD */
PAD_CFG_NF(GPP_F11, NONE, DEEP, NF1),
/* F12 : EMMC_DATA0 ==> EMMC_DAT0 */
PAD_CFG_NF(GPP_F12, NONE, DEEP, NF1),
/* F13 : EMMC_DATA1 ==> EMMC_DAT1 */
PAD_CFG_NF(GPP_F13, NONE, DEEP, NF1),
/* F14 : EMMC_DATA2 ==> EMMC_DAT2 */
PAD_CFG_NF(GPP_F14, NONE, DEEP, NF1),
/* F15 : EMMC_DATA3 ==> EMMC_DAT3 */
PAD_CFG_NF(GPP_F15, NONE, DEEP, NF1),
/* F16 : EMMC_DATA4 ==> EMMC_DAT4 */
PAD_CFG_NF(GPP_F16, NONE, DEEP, NF1),
/* F17 : EMMC_DATA5 ==> EMMC_DAT5 */
PAD_CFG_NF(GPP_F17, NONE, DEEP, NF1),
/* F18 : EMMC_DATA6 ==> EMMC_DAT6 */
PAD_CFG_NF(GPP_F18, NONE, DEEP, NF1),
/* F19 : EMMC_DATA7 ==> EMMC_DAT7 */
PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
/* F20 : EMMC_RCLK ==> EMMC_RCLK */
PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1),
/* F21 : EMMC_CLK ==> EMMC_CLK */
PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1),
/* F22 : EMMC_RESET# ==> EMMC_RST_L */
PAD_CFG_NF(GPP_F22, NONE, DEEP, NF1),
/* H19 : MEM_STRAP_0 */
PAD_CFG_GPI(GPP_H19, NONE, PLTRST),
/* H22 : MEM_STRAP_1 */

4
src/mainboard/google/hatch/variants/kindred/overridetree.cb
View File

@ -47,6 +47,9 @@ chip soc/intel/cannonlake
# GPIO for SD card detect
register "sdcard_cd_gpio" = "vSD3_CD_B"
# Enable eMMC HS400
register "ScsEmmcHs400Enabled" = "1"
device domain 0 on
device pci 15.0 on
chip drivers/i2c/generic
@ -143,6 +146,7 @@ chip soc/intel/cannonlake
device i2c 1a on end
end
end #I2C #4
device pci 1a.0 on end # eMMC
device pci 1e.3 on
chip drivers/spi/acpi
register "name" = ""CRFP""