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soc/intel/gpio: Update GPIO Lock configuration recommendation 

This patch updates the GPIO lock configuration recommendation
kconfig string to ensure the SoC user can select the correct
config as applicable for the SoC.

Note: From MTL onwards GPIO lock config can be performed using
PCR write (MMIO write) and the GPIO team has confirmed this.

BUG=b:213596994
TEST=Able to fix below GPIO lock config error msg on MTL with
`SOC_INTEL_COMMON_BLOCK_GPIO_LOCK_USING_PCR` kconfig enabled.
[INFO ]  Locking pad configuration using SBI
[INFO ]  gpio_pad_config_lock_using_sbi: Locking pad 73
         configuration
[ERROR]  SBI Failure: Transaction Status = 1
[ERROR]  Failed to lock GPIO PAD, response = 1

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Icab1e4849b8e08ee1c695c924599f1513774178f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66113
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
Subrata Banik 2022-07-24 23:47:56 +05:30 committed by Martin Roth
parent 471e24e987
commit 222852a264
1 changed files with 3 additions and 1 deletions
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4
src/soc/intel/common/block/gpio/Kconfig
View File

@ -40,7 +40,7 @@ config SOC_INTEL_COMMON_BLOCK_GPIO_LOCK_USING_SBI
bool bool
default n default n
help help
From TGL PCH onwards,`Pad Configuration Lock` can only be set or cleared Till ADL PCH,`Pad Configuration Lock` can only be set or cleared
using non-posted sideband write. using non-posted sideband write.
config SOC_INTEL_COMMON_BLOCK_GPIO_LOCK_USING_PCR config SOC_INTEL_COMMON_BLOCK_GPIO_LOCK_USING_PCR
@ -50,5 +50,7 @@ config SOC_INTEL_COMMON_BLOCK_GPIO_LOCK_USING_PCR
help help
SoC user to select this config if `Pad Configuration Lock` can only be set or SoC user to select this config if `Pad Configuration Lock` can only be set or
cleared using private configuration register (PCR) write. cleared using private configuration register (PCR) write.
Starting with MTL SoC, the recommendation is to use PCR for locking down the
GPIO configuration.
endif endif