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azalia: Use `HDA_GCTL_CRST` macro as unset-mask 

The `HDA_GCTL_CRST` corresponds to bit zero, so this is equivalent.

Change-Id: I5f4455aa1255f8954ac8b5f1ea5cf8f0874f77a4
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46728
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2020-10-24 23:36:41 +02:00 committed by Patrick Georgi
parent 554713ee0a
commit 22d4397913
5 changed files with 8 additions and 8 deletions
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2
src/southbridge/intel/bd82x6x/azalia.c
View File

@ -46,7 +46,7 @@ static int codec_detect(u8 *base)
u8 reg8; u8 reg8;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ /* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0)
goto no_codec; goto no_codec;
/* Write back the value once reset bit is set. */ /* Write back the value once reset bit is set. */

4
src/southbridge/intel/i82801gx/azalia.c
View File

@ -43,11 +43,11 @@ static int codec_detect(u8 *base)
u32 reg32; u32 reg32;
/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */ /* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */
if (set_bits(base + HDA_GCTL_REG, 1, 0) < 0) if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0) < 0)
goto no_codec; goto no_codec;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ /* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0)
goto no_codec; goto no_codec;
/* Read in Codec location (BAR + 0xe)[2..0] */ /* Read in Codec location (BAR + 0xe)[2..0] */

4
src/southbridge/intel/i82801ix/azalia.c
View File

@ -43,11 +43,11 @@ static int codec_detect(u8 *base)
u32 reg32; u32 reg32;
/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */ /* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */
if (set_bits(base + HDA_GCTL_REG, 1, 0) < 0) if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0) < 0)
goto no_codec; goto no_codec;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ /* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0)
goto no_codec; goto no_codec;
/* Read in Codec location (BAR + 0xe)[2..0] */ /* Read in Codec location (BAR + 0xe)[2..0] */

4
src/southbridge/intel/i82801jx/azalia.c
View File

@ -43,11 +43,11 @@ static int codec_detect(u8 *base)
u32 reg32; u32 reg32;
/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */ /* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */
if (set_bits(base + HDA_GCTL_REG, 1, 0) < 0) if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0) < 0)
goto no_codec; goto no_codec;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ /* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0)
goto no_codec; goto no_codec;
/* Read in Codec location (BAR + 0xe)[2..0] */ /* Read in Codec location (BAR + 0xe)[2..0] */

2
src/southbridge/intel/ibexpeak/azalia.c
View File

@ -42,7 +42,7 @@ static int codec_detect(u8 *base)
u8 reg8; u8 reg8;
/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ /* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0) if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0)
goto no_codec; goto no_codec;
/* Write back the value once reset bit is set. */ /* Write back the value once reset bit is set. */