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mb/google/brya: Disable PCH USB2 phy power gating for crota 

The patch disables PCH USB2 Phy power gating to prevent possible display
flicker issue for primus board. Please refer Intel doc#723158 for
more information.

BUG=b:237725329
TEST=Verify the build for crota board

Signed-off-by: Terry Chen <terry_chen@wistron.corp-partner.google.com>
Change-Id: I6dde74c098ba57b7cd66ce7b9ee941b8961ad20c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65594
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Cyan Yang <cyan.yang@intel.corp-partner.google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Terry Chen 2022-07-01 13:46:26 +08:00 committed by Felix Held
parent bc8ab7bf6e
commit 23ddcb0bc4
1 changed files with 4 additions and 0 deletions
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src/mainboard/google/brya/variants/crota/overridetree.cb
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@ -29,6 +29,10 @@ chip soc/intel/alderlake
register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1"
register "fast_pkg_c_ramp_disable[VR_DOMAIN_GT]" = "1"
# As per Intel Advisory doc#723158, the change is required to prevent possible
# display flickering issue.
register "usb2_phy_sus_pg_disable" = "1"
# Intel Common SoC Config
#+-------------------+---------------------------+
#| Field | Value |