src/commonlib: Fix typos
Change-Id: Ida1770c5e4b18c536e4943eb9cf862d69196c589 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38689 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
parent
1b296ee3b8
commit
23e3f9d6ed
|
@ -44,7 +44,7 @@ static size_t cbfs_next_offset(const struct region_device *cbfs,
|
|||
if (f == NULL)
|
||||
return 0;
|
||||
|
||||
/* The region_device objects store absolute offets over the whole
|
||||
/* The region_device objects store absolute offsets over the whole
|
||||
* region. Therefore a relative offset needs to be calculated. */
|
||||
offset = rdev_relative_offset(cbfs, &f->data);
|
||||
offset += region_device_sz(&f->data);
|
||||
|
|
|
@ -57,7 +57,7 @@
|
|||
#define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */
|
||||
#define EXT_CSD_BUS_WIDTH_STROBE (1<<7) /* Enhanced strobe mode */
|
||||
|
||||
#define EXT_CSD_TIMING_BC 0 /* Backwards compatility */
|
||||
#define EXT_CSD_TIMING_BC 0 /* Backwards compatibility */
|
||||
#define EXT_CSD_TIMING_HS 1 /* High speed */
|
||||
#define EXT_CSD_TIMING_HS200 2 /* HS200 */
|
||||
#define EXT_CSD_TIMING_HS400 3 /* HS400 */
|
||||
|
|
|
@ -220,7 +220,7 @@ int sd_change_freq(struct storage_media *media)
|
|||
if (!((ctrlr->caps & DRVR_CAP_HS52) && (ctrlr->caps & DRVR_CAP_HS)))
|
||||
goto out;
|
||||
|
||||
/* Give the card time to recover afer the switch operation. Wait for
|
||||
/* Give the card time to recover after the switch operation. Wait for
|
||||
* 9 (>= 8) clock cycles receiving the switch status.
|
||||
*/
|
||||
delay = (9000000 + ctrlr->bus_hz - 1) / ctrlr->bus_hz;
|
||||
|
|
Loading…
Reference in New Issue