Doc/mb/asrock/h110m: Fix the links
Change-Id: I7b925518416a4268037efac9060ef911e4ae74cd Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32052 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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@ -5,9 +5,9 @@ This page describes how to run coreboot on the [ASRock H110M-DVS].
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## Required proprietary blobs
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Mainboard is based on Intel Skylake/Kaby Lake processor and H110 Chipset.
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Intel company provides [Firmware Support Package (2.0)](../../Documentation/soc/intel/fsp/index.md)
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Intel company provides [Firmware Support Package (2.0)](../../soc/intel/fsp/index.md)
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(intel FSP 2.0) to initialize this generation silicon. Please see this
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[document](../../Documentation/soc/intel/code_development_model/code_development_model.md).
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[document](../../soc/intel/code_development_model/code_development_model.md).
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FSP Information:
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@ -82,7 +82,7 @@ The main SPI flash can be accessed using [flashrom]. By default, only
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the BIOS region of the flash is writable. If you wish to change any
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other region, such as the Management Engine or firmware descriptor, then
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an external programmer is required (unless you find a clever way around
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the flash protection). More information about this [here](../../Documentation/flash_tutorial/index.md).
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the flash protection). More information about this [here](../../flash_tutorial/index.md).
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### External programming
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