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soc/intel/alderlake: Fix devices list in the DMAR DRHD structure 

The VT-d specification states that device scope for remapping hardware
unit which has DRHD_INCLUDE_PCI_ALL flags must be the last in the list
of hardware unit definition structure. This change fixes the devices
list in the DMAR DRHD structure.

BUG=None
TEST=Built image successfully.

Signed-off-by: John Zhao <john.zhao@intel.com>
Change-Id: I14c34ad66a5ee8c30acabd8fe5a05c22087f9120
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52477
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
John Zhao 2021-04-17 13:45:00 -07:00 committed by Patrick Georgi
parent ae3f524a1f
commit 24ae31cdc6
1 changed files with 17 additions and 17 deletions
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34
src/soc/intel/alderlake/acpi.c
View File

@ -198,6 +198,23 @@ static unsigned long soc_fill_dmar(unsigned long current)
acpi_dmar_drhd_fixup(tmp, current);
}
/* TCSS Thunderbolt root ports */
for (unsigned int i = 0; i < MAX_TBT_PCIE_PORT; i++) {
const struct device *const tbt_dev = pcidev_path_on_root(SA_DEVFN_TBT(i));
if (is_dev_enabled(tbt_dev)) {
const uint64_t tbtbar = MCHBAR64(TBTxBAR(i)) & VTBAR_MASK;
const bool tbten = MCHBAR32(TBTxBAR(i)) & VTBAR_ENABLED;
if (tbtbar && tbten) {
const unsigned long tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, tbtbar);
current += acpi_create_dmar_ds_pci_br(current, 0, 7, i);
acpi_dmar_drhd_fixup(tmp, current);
}
}
}
const uint64_t vtvc0bar = MCHBAR64(VTVC0BAR) & VTBAR_MASK;
const bool vtvc0en = MCHBAR32(VTVC0BAR) & VTBAR_ENABLED;
@ -216,23 +233,6 @@ static unsigned long soc_fill_dmar(unsigned long current)
acpi_dmar_drhd_fixup(tmp, current);
}
/* TCSS Thunderbolt root ports */
for (unsigned int i = 0; i < MAX_TBT_PCIE_PORT; i++) {
const struct device *const tbt_dev = pcidev_path_on_root(SA_DEVFN_TBT(i));
if (is_dev_enabled(tbt_dev)) {
const uint64_t tbtbar = MCHBAR64(TBTxBAR(i)) & VTBAR_MASK;
const bool tbten = MCHBAR32(TBTxBAR(i)) & VTBAR_ENABLED;
if (tbtbar && tbten) {
const unsigned long tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, tbtbar);
current += acpi_create_dmar_ds_pci_br(current, 0, 7, i);
acpi_dmar_drhd_fixup(tmp, current);
}
}
}
/* Add RMRR entry */
if (is_dev_enabled(igfx_dev)) {
const unsigned long tmp = current;