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soc/intel/apollolake: fix SPI input clock speed 

On APL and GLK the i2c blocks use 133MHz input clock, but the
SPI blocks use a 100MHz input clock. Fix this so that the proper
target frequencies can be hit on the SPI controllers.

BUG=b:75306520

Change-Id: Iec36579894fa4633ac8d1035e6e7afec01af755f
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/25609
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
This commit is contained in:
Aaron Durbin 2018-04-10 09:28:42 -06:00
parent e09ba47b8b
commit 24de59702f
1 changed files with 2 additions and 2 deletions
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4
src/soc/intel/apollolake/Kconfig
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@ -161,11 +161,11 @@ config CPU_ADDR_BITS
config SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ config SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ
int int
default 133 default 100
config DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ config DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ
int int
default SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ default 133
config CONSOLE_UART_BASE_ADDRESS config CONSOLE_UART_BASE_ADDRESS
depends on CONSOLE_SERIAL depends on CONSOLE_SERIAL