soc/intel/cannonlake: Set Cannonlake I2C clock

Correct Cannonlake I2C clock frequency to 133Mhz that will match the
silicon, Cannonlake have I2C clock force to 133Mhz.

BUG=b:75306520

Change-Id: Iaab8851bb00cf27876d4068167a283ed79a28b2d
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/25610
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Lijian Zhao 2018-04-10 10:33:05 -07:00 committed by Aaron Durbin
parent 551e4be730
commit e09ba47b8b
1 changed files with 1 additions and 1 deletions

View File

@ -192,7 +192,7 @@ config SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ
config DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ
int
default SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ
default 133
config SOC_INTEL_COMMON_BLOCK_GSPI_MAX
int