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soc/intel/cannonlake: Configure Vmx support using Kconfig 

Change VmxEnable UPD values based on Kconfig ENABLE_VMX
and remove it from Devicetree and chip.h

Remove Vmx dependency on Vt-d

Change-Id: I4180c2270038a28befd6ed53c9485905025a15ba
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32117
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Ronak Kanabar 2019-03-29 13:25:09 +05:30 committed by Nico Huber
parent a432f38e81
commit 250dfc0256
4 changed files with 2 additions and 8 deletions
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1
src/mainboard/google/sarien/variants/arcada/devicetree.cb
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@ -22,7 +22,6 @@ chip soc/intel/cannonlake
register "SataPortsDevSlp[2]" = "1" register "SataPortsDevSlp[2]" = "1"
register "InternalGfx" = "1" register "InternalGfx" = "1"
register "SkipExtGfxScan" = "1" register "SkipExtGfxScan" = "1"
register "VmxEnable" = "1"
register "PchPmSlpS3MinAssert" = "3" # 50ms register "PchPmSlpS3MinAssert" = "3" # 50ms
register "PchPmSlpS4MinAssert" = "4" # 4s register "PchPmSlpS4MinAssert" = "4" # 4s
register "PchPmSlpSusMinAssert" = "4" # 4s register "PchPmSlpSusMinAssert" = "4" # 4s

1
src/mainboard/google/sarien/variants/sarien/devicetree.cb
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@ -26,7 +26,6 @@ chip soc/intel/cannonlake
register "SataPortsDevSlp[2]" = "1" register "SataPortsDevSlp[2]" = "1"
register "InternalGfx" = "1" register "InternalGfx" = "1"
register "SkipExtGfxScan" = "1" register "SkipExtGfxScan" = "1"
register "VmxEnable" = "1"
register "PchPmSlpS3MinAssert" = "3" # 50ms register "PchPmSlpS3MinAssert" = "3" # 50ms
register "PchPmSlpS4MinAssert" = "4" # 4s register "PchPmSlpS4MinAssert" = "4" # 4s
register "PchPmSlpSusMinAssert" = "4" # 4s register "PchPmSlpSusMinAssert" = "4" # 4s

1
src/soc/intel/cannonlake/chip.h
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@ -354,7 +354,6 @@ struct soc_intel_cannonlake_config {
/* Intel VT configuration */ /* Intel VT configuration */
uint8_t VtdDisable; uint8_t VtdDisable;
uint8_t VmxEnable;
/* /*
* Acoustic Noise Mitigation * Acoustic Noise Mitigation

7
src/soc/intel/cannonlake/romstage/fsp_params.c
View File

@ -61,11 +61,8 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, const config_t *config)
m_cfg->PcdDebugInterfaceFlags = m_cfg->PcdDebugInterfaceFlags =
CONFIG(DRIVERS_UART_8250IO) ? 0x02 : 0x10; CONFIG(DRIVERS_UART_8250IO) ? 0x02 : 0x10;
/* Disable Vmx if Vt-d is already disabled */ /* Change VmxEnable UPD value according to ENABLE_VMX Kconfig */
if (config->VtdDisable) m_cfg->VmxEnable = CONFIG(ENABLE_VMX);
m_cfg->VmxEnable = 0;
else
m_cfg->VmxEnable = config->VmxEnable;
#if CONFIG(SOC_INTEL_COMMON_CANNONLAKE_BASE) #if CONFIG(SOC_INTEL_COMMON_CANNONLAKE_BASE)
if (CONFIG(USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI)) if (CONFIG(USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI))