soc/intel/common: Add Elkhartlake Device IDs

Add Elkhartlake CPU, SA and PCH IDs.
EHL PCH is code named as MCC.
Also add a MCH ID (JSL_EHL) which is shared by both JSL and EHL SKUs.

Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Change-Id: I03f15832143bcc3095a3936c65fbc30a95e7f0f6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38489
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/include/device/pci_ids.h

@@ -2811,6 +2811,14 @@
 #define PCI_DEVICE_ID_INTEL_TGP_ESPI_26	0xA09F
 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_ESPI_1	0x3887
 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_ESPI_2	0x4d80
+#define PCI_DEVICE_ID_INTEL_MCC_ESPI_0			0x4b00
+#define PCI_DEVICE_ID_INTEL_MCC_ESPI_1			0x4b04
+#define PCI_DEVICE_ID_INTEL_MCC_BASE_ESPI		0x4b03
+#define PCI_DEVICE_ID_INTEL_MCC_PREMIUM_ESPI		0x4b02
+#define PCI_DEVICE_ID_INTEL_MCC_SUPER_ESPI		0x4b01
+#define PCI_DEVICE_ID_INTEL_MCC_ESPI_2			0x4b05
+#define PCI_DEVICE_ID_INTEL_MCC_ESPI_3			0x4b06
+#define PCI_DEVICE_ID_INTEL_MCC_ESPI_4			0x4b07
 
 /* Intel PCIE device ids  */
 #define PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP1		0x9d10
@@ -3039,6 +3047,14 @@
 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP7		0x38be
 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP8		0x38bf
 
+#define PCI_DEVICE_ID_INTEL_MCC_PCIE_RP1		0x4b38
+#define PCI_DEVICE_ID_INTEL_MCC_PCIE_RP2		0x4b39
+#define PCI_DEVICE_ID_INTEL_MCC_PCIE_RP3		0x4b3a
+#define PCI_DEVICE_ID_INTEL_MCC_PCIE_RP4		0x4b3b
+#define PCI_DEVICE_ID_INTEL_MCC_PCIE_RP5		0x4b3c
+#define PCI_DEVICE_ID_INTEL_MCC_PCIE_RP6		0x4b3d
+#define PCI_DEVICE_ID_INTEL_MCC_PCIE_RP7		0x4b3e
+
 /* Intel SATA device Ids */
 #define PCI_DEVICE_ID_INTEL_SPT_U_SATA		0x9d03
 #define PCI_DEVICE_ID_INTEL_SPT_U_Y_PREMIUM_SATA		0x9d07
@@ -3074,6 +3090,7 @@
 #define PCI_DEVICE_ID_INTEL_TGP_PREMIUM_SATA	0xa0d7
 #define PCI_DEVICE_ID_INTEL_TGP_COMPAT_SATA	0x282a
 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SATA		0x38d3
+#define PCI_DEVICE_ID_INTEL_MCC_AHCI_SATA	0x4b60
 
 /* Intel PMC device Ids */
 #define PCI_DEVICE_ID_INTEL_SPT_LP_PMC		0x9d21
@@ -3090,6 +3107,7 @@
 #define PCI_DEVICE_ID_INTEL_CMP_H_PMC		0x06a1
 #define PCI_DEVICE_ID_INTEL_TGP_PMC		0xa0a1
 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PMC		0x38a1
+#define PCI_DEVICE_ID_INTEL_MCC_PMC		0x4b21
 
 /* Intel I2C device Ids */
 #define PCI_DEVICE_ID_INTEL_SPT_I2C0		0x9d60
@@ -3152,7 +3170,14 @@
 #define PCI_DEVICE_ID_INTEL_TGP_I2C5		0xa0c6
 #define PCI_DEVICE_ID_INTEL_TGP_I2C6		0xa0d8
 #define PCI_DEVICE_ID_INTEL_TGP_I2C7		0xa0d9
-
+#define PCI_DEVICE_ID_INTEL_MCC_I2C0		0x4b78
+#define PCI_DEVICE_ID_INTEL_MCC_I2C1		0x4b79
+#define PCI_DEVICE_ID_INTEL_MCC_I2C2		0x4b7a
+#define PCI_DEVICE_ID_INTEL_MCC_I2C3		0x4b7b
+#define PCI_DEVICE_ID_INTEL_MCC_I2C4		0x4b4b
+#define PCI_DEVICE_ID_INTEL_MCC_I2C5		0x4b4c
+#define PCI_DEVICE_ID_INTEL_MCC_I2C6		0x4b44
+#define PCI_DEVICE_ID_INTEL_MCC_I2C7		0x4b45
 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C0		0x38e8
 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C1		0x38e9
 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C2		0x38ea
@@ -3196,7 +3221,9 @@
 #define PCI_DEVICE_ID_INTEL_TGP_UART0		0xa0a8
 #define PCI_DEVICE_ID_INTEL_TGP_UART1		0xa0a9
 #define PCI_DEVICE_ID_INTEL_TGP_UART2		0xa0c7
-
+#define PCI_DEVICE_ID_INTEL_MCC_UART0		0x4b28
+#define PCI_DEVICE_ID_INTEL_MCC_UART1		0x4b29
+#define PCI_DEVICE_ID_INTEL_MCC_UART2		0x4b4d
 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_UART0		0x38a8
 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_UART1		0x38a9
 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_UART2		0x38c7
@@ -3242,7 +3269,10 @@
 #define PCI_DEVICE_ID_INTEL_TGP_GSPI4		0xa0fe
 #define PCI_DEVICE_ID_INTEL_TGP_GSPI5		0xa0de
 #define PCI_DEVICE_ID_INTEL_TGP_GSPI6		0xa0df
-
+#define PCI_DEVICE_ID_INTEL_MCC_SPI0		0x4b24
+#define PCI_DEVICE_ID_INTEL_MCC_GSPI0		0x4b2a
+#define PCI_DEVICE_ID_INTEL_MCC_GSPI1		0x4b2b
+#define PCI_DEVICE_ID_INTEL_MCC_GSPI2		0x4b37
 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SPI0		0x38aa
 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SPI1		0x38ab
 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SPI2		0x38fb
@@ -3351,6 +3381,12 @@
 #define PCI_DEVICE_ID_INTEL_TGL_GT2_ULT			0x9A49
 #define PCI_DEVICE_ID_INTEL_TGL_GT3_ULT			0x9A52
 #define PCI_DEVICE_ID_INTEL_TGL_GT2_ULX			0x9A40
+#define PCI_DEVICE_ID_INTEL_EHL_GT1_1			0x4541
+#define PCI_DEVICE_ID_INTEL_EHL_GT2_1			0x4540
+#define PCI_DEVICE_ID_INTEL_EHL_GT1_2			0x4551
+#define PCI_DEVICE_ID_INTEL_EHL_GT2_2			0x4550
+#define PCI_DEVICE_ID_INTEL_EHL_GT1_3			0x4571
+#define PCI_DEVICE_ID_INTEL_EHL_GT2_3			0x4570
 #define PCI_DEVICE_ID_INTEL_JSL_PRE_PROD_GT0		0x4569
 
 /* Intel Northbridge Ids */
@@ -3411,6 +3447,8 @@
 #define PCI_DEVICE_ID_INTEL_TGL_ID_U_1		0x9A12
 #define PCI_DEVICE_ID_INTEL_TGL_ID_Y		0x9A10
 #define PCI_DEVICE_ID_INTEL_JSL_PRE_PROD	0x4e2a
+#define PCI_DEVICE_ID_INTEL_JSL_EHL		0x4532
+#define PCI_DEVICE_ID_INTEL_EHL_ID_1		0x4510
 
 /* Intel SMBUS device Ids */
 #define PCI_DEVICE_ID_INTEL_SPT_LP_SMBUS		0x9d23
@@ -3424,6 +3462,7 @@
 #define PCI_DEVICE_ID_INTEL_CMP_H_SMBUS			0x06a3
 #define PCI_DEVICE_ID_INTEL_TGP_LP_SMBUS		0xa0a3
 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SMBUS		0x38a3
+#define PCI_DEVICE_ID_INTEL_MCC_SMBUS			0x4b23
 
 /* Intel XHCI device Ids */
 #define PCI_DEVICE_ID_INTEL_APL_XHCI		0x5aa8
@@ -3440,6 +3479,7 @@
 #define PCI_DEVICE_ID_INTEL_CMP_H_XHCI		0x06ed
 #define PCI_DEVICE_ID_INTEL_TGP_LP_XHCI		0xa0ed
 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_XHCI	0x38ed
+#define PCI_DEVICE_ID_INTEL_MCC_XHCI		0x4b7d
 
 /* Intel P2SB device Ids */
 #define PCI_DEVICE_ID_INTEL_APL_P2SB		0x5a92
@@ -3456,6 +3496,7 @@
 #define PCI_DEVICE_ID_INTEL_CMP_H_P2SB		0x06a0
 #define PCI_DEVICE_ID_INTEL_TGL_P2SB		0xa0a0
 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_P2SB	0x38a0
+#define PCI_DEVICE_ID_INTEL_EHL_P2SB		0x4b20
 
 /* Intel SRAM device Ids */
 #define PCI_DEVICE_ID_INTEL_APL_SRAM		0x5aec
@@ -3467,6 +3508,7 @@
 #define PCI_DEVICE_ID_INTEL_CMP_H_SRAM		0x06ef
 #define PCI_DEVICE_ID_INTEL_TGL_SRAM		0xa0ef
 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SRAM	0x38ef
+#define PCI_DEVICE_ID_INTEL_MCC_SRAM		0x4b7f
 
 /* Intel AUDIO device Ids */
 #define PCI_DEVICE_ID_INTEL_APL_AUDIO		0x5a98
@@ -3484,6 +3526,7 @@
 #define PCI_DEVICE_ID_INTEL_BSW_AUDIO		0x2284
 #define PCI_DEVICE_ID_INTEL_TGL_AUDIO		0xa0c8
 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_AUDIO	0x38c8
+#define PCI_DEVICE_ID_INTEL_MCC_AUDIO		0x4b55
 
 /* Intel HECI/ME device Ids */
 #define PCI_DEVICE_ID_INTEL_APL_CSE0		0x5a9a
@@ -3502,6 +3545,10 @@
 #define PCI_DEVICE_ID_INTEL_CMP_H_CSE0		0x06e0
 #define PCI_DEVICE_ID_INTEL_TGL_CSE0		0xa0e0
 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_CSE0	0x38e0
+#define PCI_DEVICE_ID_INTEL_MCC_CSE0		0x4b70
+#define PCI_DEVICE_ID_INTEL_MCC_CSE1		0x4b71
+#define PCI_DEVICE_ID_INTEL_MCC_CSE2		0x4b74
+#define PCI_DEVICE_ID_INTEL_MCC_CSE3		0x4b75
 
 /* Intel XDCI device Ids */
 #define PCI_DEVICE_ID_INTEL_APL_XDCI		0x5aaa
@@ -3513,6 +3560,7 @@
 #define PCI_DEVICE_ID_INTEL_CMP_LP_XDCI		0x02ee
 #define PCI_DEVICE_ID_INTEL_CMP_H_XDCI		0x06ee
 #define PCI_DEVICE_ID_INTEL_TGP_LP_XDCI		0xa0ee
+#define PCI_DEVICE_ID_INTEL_MCC_XDCI		0x4b7e
 
 /* Intel SD device Ids */
 #define PCI_DEVICE_ID_INTEL_APL_SD		0x5aca
@@ -3524,6 +3572,7 @@
 #define PCI_DEVICE_ID_INTEL_CMP_SD		0x02f5
 #define PCI_DEVICE_ID_INTEL_CMP_H_SD		0x06f5
 #define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SD	0x38f8
+#define PCI_DEVICE_ID_INTEL_MCC_SD		0x4b48
 
 /* Intel EMMC device Ids */
 #define PCI_DEVICE_ID_INTEL_SKL_EMMC		0x9d2b

src/soc/intel/common/block/cpu/mp_init.c

@@ -87,6 +87,7 @@ static const struct cpu_device_id cpu_table[] = {
 	{ X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_P0 },
 	{ X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_Q0_P1 },
 	{ X86_VENDOR_INTEL, CPUID_TIGERLAKE_A0 },
+	{ X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_A0 },
 	{ 0, 0 },
 };
 

src/soc/intel/common/block/cse/cse.c

@@ -740,6 +740,10 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_CMP_H_CSE0,
 	PCI_DEVICE_ID_INTEL_TGL_CSE0,
 	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_CSE0,
+	PCI_DEVICE_ID_INTEL_MCC_CSE0,
+	PCI_DEVICE_ID_INTEL_MCC_CSE1,
+	PCI_DEVICE_ID_INTEL_MCC_CSE2,
+	PCI_DEVICE_ID_INTEL_MCC_CSE3,
 	0,
 };
 

src/soc/intel/common/block/dsp/dsp.c

@@ -37,6 +37,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_ICL_AUDIO,
 	PCI_DEVICE_ID_INTEL_TGL_AUDIO,
 	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_AUDIO,
+	PCI_DEVICE_ID_INTEL_MCC_AUDIO,
 	0,
 };
 

src/soc/intel/common/block/graphics/graphics.c

@@ -220,6 +220,12 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_TGL_GT2_ULX,
 	PCI_DEVICE_ID_INTEL_TGL_GT3_ULT,
 	PCI_DEVICE_ID_INTEL_JSL_PRE_PROD_GT0,
+	PCI_DEVICE_ID_INTEL_EHL_GT1_1,
+	PCI_DEVICE_ID_INTEL_EHL_GT2_1,
+	PCI_DEVICE_ID_INTEL_EHL_GT1_2,
+	PCI_DEVICE_ID_INTEL_EHL_GT2_2,
+	PCI_DEVICE_ID_INTEL_EHL_GT1_3,
+	PCI_DEVICE_ID_INTEL_EHL_GT2_3,
 	0,
 };
 

src/soc/intel/common/block/hda/hda.c

@@ -84,6 +84,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_CMP_H_AUDIO,
 	PCI_DEVICE_ID_INTEL_BSW_AUDIO,
 	PCI_DEVICE_ID_INTEL_TGL_AUDIO,
+	PCI_DEVICE_ID_INTEL_MCC_AUDIO,
 	0
 };
 

src/soc/intel/common/block/i2c/i2c.c

@@ -255,6 +255,14 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C3,
 	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C4,
 	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C5,
+	PCI_DEVICE_ID_INTEL_MCC_I2C0,
+	PCI_DEVICE_ID_INTEL_MCC_I2C1,
+	PCI_DEVICE_ID_INTEL_MCC_I2C2,
+	PCI_DEVICE_ID_INTEL_MCC_I2C3,
+	PCI_DEVICE_ID_INTEL_MCC_I2C4,
+	PCI_DEVICE_ID_INTEL_MCC_I2C5,
+	PCI_DEVICE_ID_INTEL_MCC_I2C6,
+	PCI_DEVICE_ID_INTEL_MCC_I2C7,
 	0,
 };
 

src/soc/intel/common/block/include/intelblocks/mp_init.h

@@ -54,6 +54,7 @@
 #define CPUID_COMETLAKE_H_S_10_2_P0	0xa0651
 #define CPUID_COMETLAKE_H_S_10_2_Q0_P1	0xa0654
 #define CPUID_TIGERLAKE_A0	0x806c0
+#define CPUID_ELKHARTLAKE_A0	0x90660
 
 /*
  * MP Init callback function to Find CPU Topology. This function is common

src/soc/intel/common/block/lpc/lpc.c

@@ -226,6 +226,14 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_TGP_ESPI_26,
 	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_ESPI_1,
 	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_ESPI_2,
+	PCI_DEVICE_ID_INTEL_MCC_ESPI_0,
+	PCI_DEVICE_ID_INTEL_MCC_ESPI_1,
+	PCI_DEVICE_ID_INTEL_MCC_BASE_ESPI,
+	PCI_DEVICE_ID_INTEL_MCC_PREMIUM_ESPI,
+	PCI_DEVICE_ID_INTEL_MCC_SUPER_ESPI,
+	PCI_DEVICE_ID_INTEL_MCC_ESPI_2,
+	PCI_DEVICE_ID_INTEL_MCC_ESPI_3,
+	PCI_DEVICE_ID_INTEL_MCC_ESPI_4,
 	0
 };
 

src/soc/intel/common/block/p2sb/p2sb.c

@@ -182,6 +182,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_CMP_H_P2SB,
 	PCI_DEVICE_ID_INTEL_TGL_P2SB,
 	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_P2SB,
+	PCI_DEVICE_ID_INTEL_EHL_P2SB,
 	0,
 };
 

src/soc/intel/common/block/pcie/pcie.c

@@ -298,6 +298,13 @@ static const unsigned short pcie_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP6,
 	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP7,
 	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP8,
+	PCI_DEVICE_ID_INTEL_MCC_PCIE_RP1,
+	PCI_DEVICE_ID_INTEL_MCC_PCIE_RP2,
+	PCI_DEVICE_ID_INTEL_MCC_PCIE_RP3,
+	PCI_DEVICE_ID_INTEL_MCC_PCIE_RP4,
+	PCI_DEVICE_ID_INTEL_MCC_PCIE_RP5,
+	PCI_DEVICE_ID_INTEL_MCC_PCIE_RP6,
+	PCI_DEVICE_ID_INTEL_MCC_PCIE_RP7,
 	0
 };
 

src/soc/intel/common/block/pmc/pmc.c

@@ -136,6 +136,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_CMP_H_PMC,
 	PCI_DEVICE_ID_INTEL_TGP_PMC,
 	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PMC,
+	PCI_DEVICE_ID_INTEL_MCC_PMC,
 	0
 };
 

src/soc/intel/common/block/sata/sata.c

@@ -104,6 +104,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_TGP_PREMIUM_SATA,
 	PCI_DEVICE_ID_INTEL_TGP_COMPAT_SATA,
 	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SATA,
+	PCI_DEVICE_ID_INTEL_MCC_AHCI_SATA,
 	0
 };
 

src/soc/intel/common/block/scs/sd.c

@@ -75,6 +75,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_CMP_SD,
 	PCI_DEVICE_ID_INTEL_CMP_H_SD,
 	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SD,
+	PCI_DEVICE_ID_INTEL_MCC_SD,
 	0
 };
 

src/soc/intel/common/block/smbus/smbus.c

@@ -98,6 +98,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_CMP_H_SMBUS,
 	PCI_DEVICE_ID_INTEL_TGP_LP_SMBUS,
 	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SMBUS,
+	PCI_DEVICE_ID_INTEL_MCC_SMBUS,
 	0
 };
 

src/soc/intel/common/block/spi/spi.c

@@ -97,6 +97,10 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SPI1,
 	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SPI2,
 	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_HWSEQ_SPI,
+	PCI_DEVICE_ID_INTEL_MCC_SPI0,
+	PCI_DEVICE_ID_INTEL_MCC_GSPI0,
+	PCI_DEVICE_ID_INTEL_MCC_GSPI1,
+	PCI_DEVICE_ID_INTEL_MCC_GSPI2,
 	0
 };
 

src/soc/intel/common/block/sram/sram.c

@@ -54,6 +54,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_CMP_H_SRAM,
 	PCI_DEVICE_ID_INTEL_TGL_SRAM,
 	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SRAM,
+	PCI_DEVICE_ID_INTEL_MCC_SRAM,
 	0,
 };
 

src/soc/intel/common/block/systemagent/systemagent.c

@@ -400,6 +400,8 @@ static const unsigned short systemagent_ids[] = {
 	PCI_DEVICE_ID_INTEL_TGL_ID_U_1,
 	PCI_DEVICE_ID_INTEL_TGL_ID_Y,
 	PCI_DEVICE_ID_INTEL_JSL_PRE_PROD,
+	PCI_DEVICE_ID_INTEL_JSL_EHL,
+	PCI_DEVICE_ID_INTEL_EHL_ID_1,
 	0
 };
 

src/soc/intel/common/block/uart/uart.c

@@ -284,6 +284,9 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_UART0,
 	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_UART1,
 	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_UART2,
+	PCI_DEVICE_ID_INTEL_MCC_UART0,
+	PCI_DEVICE_ID_INTEL_MCC_UART1,
+	PCI_DEVICE_ID_INTEL_MCC_UART2,
 	0,
 };
 

src/soc/intel/common/block/xdci/xdci.c

@@ -45,6 +45,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_CMP_LP_XDCI,
 	PCI_DEVICE_ID_INTEL_CMP_H_XDCI,
 	PCI_DEVICE_ID_INTEL_TGP_LP_XDCI,
+	PCI_DEVICE_ID_INTEL_MCC_XDCI,
 	0
 };
 

src/soc/intel/common/block/xhci/xhci.c

@@ -134,6 +134,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_CMP_H_XHCI,
 	PCI_DEVICE_ID_INTEL_TGP_LP_XHCI,
 	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_XHCI,
+	PCI_DEVICE_ID_INTEL_MCC_XHCI,
 	0
 };
 

src/soc/intel/tigerlake/bootblock/report_platform.c

@@ -48,6 +48,8 @@ static struct {
 	{ PCI_DEVICE_ID_INTEL_TGL_ID_U_1, "Tigerlake-U-4-3e" },
 	{ PCI_DEVICE_ID_INTEL_TGL_ID_Y, "Tigerlake-Y-4-2" },
 	{ PCI_DEVICE_ID_INTEL_JSL_PRE_PROD, "Jasperlake Pre Prod" },
+	{ PCI_DEVICE_ID_INTEL_JSL_EHL, "Jasperlake Elkhartlake" },
+	{ PCI_DEVICE_ID_INTEL_EHL_ID_1, "Elkhartlake-1" },
 };
 
 static struct {
@@ -88,6 +90,11 @@ static struct {
 	{ PCI_DEVICE_ID_INTEL_TGP_ESPI_26, "Tigerlake-Base SKU" },
 	{ PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_ESPI_1, "Jasperlake Pre Prod" },
 	{ PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_ESPI_2, "Jasperlake Pre Prod" },
+	{ PCI_DEVICE_ID_INTEL_MCC_ESPI_0, "Elkhartlake-0" },
+	{ PCI_DEVICE_ID_INTEL_MCC_ESPI_1, "Elkhartlake-1" },
+	{ PCI_DEVICE_ID_INTEL_MCC_BASE_ESPI, "Elkhartlake Base" },
+	{ PCI_DEVICE_ID_INTEL_MCC_PREMIUM_ESPI, "Elkhartlake Premium" },
+	{ PCI_DEVICE_ID_INTEL_MCC_SUPER_ESPI, "Elkhartlake Super" },
 };
 
 static struct {
@@ -99,6 +106,12 @@ static struct {
 	{ PCI_DEVICE_ID_INTEL_TGL_GT2_ULX, "Tigerlake Y GT2" },
 	{ PCI_DEVICE_ID_INTEL_TGL_GT3_ULT, "Tigerlake U GT3" },
 	{ PCI_DEVICE_ID_INTEL_JSL_PRE_PROD_GT0, "Jasperlake Pre Prod GT0" },
+	{ PCI_DEVICE_ID_INTEL_EHL_GT1_1, "Elkhartlake GT1 1" },
+	{ PCI_DEVICE_ID_INTEL_EHL_GT2_1, "Elkhartlake GT2 1" },
+	{ PCI_DEVICE_ID_INTEL_EHL_GT1_2, "Elkhartlake GT1 2" },
+	{ PCI_DEVICE_ID_INTEL_EHL_GT2_2, "Elkhartlake GT2 2" },
+	{ PCI_DEVICE_ID_INTEL_EHL_GT1_3, "Elkhartlake GT1 3" },
+	{ PCI_DEVICE_ID_INTEL_EHL_GT2_3, "Elkhartlake GT2 3" },
 };
 
 static inline uint8_t get_dev_revision(pci_devfn_t dev)