soc/intel/common: Add Jasperlake Device IDs

Add Jasperlake SA and PCH IDs

Change-Id: I2c9ec1ee4236184b986d99250f263172c80f7117
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37434
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>

src/include/device/pci_ids.h

@@ -2809,6 +2809,8 @@
 #define PCI_DEVICE_ID_INTEL_TGP_ESPI_24	0xA09D
 #define PCI_DEVICE_ID_INTEL_TGP_ESPI_25	0xA09E
 #define PCI_DEVICE_ID_INTEL_TGP_ESPI_26	0xA09F
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_ESPI_1	0x3887
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_ESPI_2	0x4d80
 
 /* Intel PCIE device ids  */
 #define PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP1		0x9d10
@@ -3004,6 +3006,15 @@
 #define PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP15		0x02b6
 #define PCI_DEVICE_ID_INTEL_CMP_LP_PCIE_RP16		0x02b7
 
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP1		0x38b8
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP2		0x38b9
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP3		0x38ba
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP4		0x38bb
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP5		0x38bc
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP6		0x38bd
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP7		0x38be
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP8		0x38bf
+
 /* Intel SATA device Ids */
 #define PCI_DEVICE_ID_INTEL_SPT_U_SATA		0x9d03
 #define PCI_DEVICE_ID_INTEL_SPT_U_Y_PREMIUM_SATA		0x9d07
@@ -3035,6 +3046,7 @@
 #define PCI_DEVICE_ID_INTEL_TGP_SATA		0xa0d5
 #define PCI_DEVICE_ID_INTEL_TGP_PREMIUM_SATA	0xa0d7
 #define PCI_DEVICE_ID_INTEL_TGP_COMPAT_SATA	0x282a
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SATA		0x38d3
 
 /* Intel PMC device Ids */
 #define PCI_DEVICE_ID_INTEL_SPT_LP_PMC		0x9d21
@@ -3049,6 +3061,7 @@
 #define PCI_DEVICE_ID_INTEL_ICP_PMC		0x34a1
 #define PCI_DEVICE_ID_INTEL_CMP_PMC		0x02a1
 #define PCI_DEVICE_ID_INTEL_TGP_PMC		0xa0a1
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PMC		0x38a1
 
 /* Intel I2C device Ids */
 #define PCI_DEVICE_ID_INTEL_SPT_I2C0		0x9d60
@@ -3108,6 +3121,13 @@
 #define PCI_DEVICE_ID_INTEL_TGP_I2C6		0xa0d8
 #define PCI_DEVICE_ID_INTEL_TGP_I2C7		0xa0d9
 
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C0		0x38e8
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C1		0x38e9
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C2		0x38ea
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C3		0x38eb
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C4		0x38c5
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C5		0x38c6
+
 /* Intel UART device Ids */
 #define PCI_DEVICE_ID_INTEL_SPT_UART0		0x9d27
 #define PCI_DEVICE_ID_INTEL_SPT_UART1		0x9d28
@@ -3142,6 +3162,10 @@
 #define PCI_DEVICE_ID_INTEL_TGP_UART1		0xa0a9
 #define PCI_DEVICE_ID_INTEL_TGP_UART2		0xa0c7
 
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_UART0		0x38a8
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_UART1		0x38a9
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_UART2		0x38c7
+
 /* Intel SPI device Ids */
 #define PCI_DEVICE_ID_INTEL_SPT_SPI1		0x9d24
 #define PCI_DEVICE_ID_INTEL_SPT_SPI2		0x9d29
@@ -3180,6 +3204,11 @@
 #define PCI_DEVICE_ID_INTEL_TGP_GSPI5		0xa0de
 #define PCI_DEVICE_ID_INTEL_TGP_GSPI6		0xa0df
 
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SPI0		0x38aa
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SPI1		0x38ab
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SPI2		0x38fb
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_HWSEQ_SPI		0x38a4
+
 /* Intel IGD device Ids */
 #define PCI_DEVICE_ID_INTEL_SKL_GT1F_DT2		0x1902
 #define PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM		0x1906
@@ -3283,6 +3312,7 @@
 #define PCI_DEVICE_ID_INTEL_TGL_GT2_ULT			0x9A49
 #define PCI_DEVICE_ID_INTEL_TGL_GT3_ULT			0x9A52
 #define PCI_DEVICE_ID_INTEL_TGL_GT2_ULX			0x9A40
+#define PCI_DEVICE_ID_INTEL_JSL_PRE_PROD_GT0		0x4569
 
 /* Intel Northbridge Ids */
 #define PCI_DEVICE_ID_INTEL_APL_NB		0x5af0
@@ -3338,6 +3368,7 @@
 #define PCI_DEVICE_ID_INTEL_TGL_ID_U		0x9A14
 #define PCI_DEVICE_ID_INTEL_TGL_ID_U_1		0x9A12
 #define PCI_DEVICE_ID_INTEL_TGL_ID_Y		0x9A10
+#define PCI_DEVICE_ID_INTEL_JSL_PRE_PROD	0x4e2a
 
 /* Intel SMBUS device Ids */
 #define PCI_DEVICE_ID_INTEL_SPT_LP_SMBUS		0x9d23
@@ -3349,6 +3380,7 @@
 #define PCI_DEVICE_ID_INTEL_ICP_LP_SMBUS		0x34a3
 #define PCI_DEVICE_ID_INTEL_CMP_SMBUS			0x02a3
 #define PCI_DEVICE_ID_INTEL_TGP_LP_SMBUS		0xa0a3
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SMBUS		0x38a3
 
 /* Intel XHCI device Ids */
 #define PCI_DEVICE_ID_INTEL_APL_XHCI		0x5aa8
@@ -3363,6 +3395,7 @@
 #define PCI_DEVICE_ID_INTEL_ICP_LP_XHCI		0x34ed
 #define PCI_DEVICE_ID_INTEL_CMP_LP_XHCI		0x02ed
 #define PCI_DEVICE_ID_INTEL_TGP_LP_XHCI		0xa0ed
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_XHCI	0x38ed
 
 /* Intel P2SB device Ids */
 #define PCI_DEVICE_ID_INTEL_APL_P2SB		0x5a92
@@ -3377,6 +3410,7 @@
 #define PCI_DEVICE_ID_INTEL_ICL_P2SB		0x34a0
 #define PCI_DEVICE_ID_INTEL_CMP_P2SB		0x02a0
 #define PCI_DEVICE_ID_INTEL_TGL_P2SB		0xa0a0
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_P2SB	0x38a0
 
 /* Intel SRAM device Ids */
 #define PCI_DEVICE_ID_INTEL_APL_SRAM		0x5aec
@@ -3386,6 +3420,7 @@
 #define PCI_DEVICE_ID_INTEL_ICL_SRAM		0x34ef
 #define PCI_DEVICE_ID_INTEL_CMP_SRAM		0x02ef
 #define PCI_DEVICE_ID_INTEL_TGL_SRAM		0xa0ef
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SRAM	0x38ef
 
 /* Intel AUDIO device Ids */
 #define PCI_DEVICE_ID_INTEL_APL_AUDIO		0x5a98
@@ -3401,6 +3436,7 @@
 #define PCI_DEVICE_ID_INTEL_CMP_AUDIO		0x02c8
 #define PCI_DEVICE_ID_INTEL_BSW_AUDIO		0x2284
 #define PCI_DEVICE_ID_INTEL_TGL_AUDIO		0xa0c8
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_AUDIO	0x38c8
 
 /* Intel HECI/ME device Ids */
 #define PCI_DEVICE_ID_INTEL_APL_CSE0		0x5a9a
@@ -3417,6 +3453,7 @@
 #define PCI_DEVICE_ID_INTEL_ICL_CSE0		0x34e0
 #define PCI_DEVICE_ID_INTEL_CMP_CSE0		0x02e0
 #define PCI_DEVICE_ID_INTEL_TGL_CSE0		0xa0e0
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_CSE0	0x38e0
 
 /* Intel XDCI device Ids */
 #define PCI_DEVICE_ID_INTEL_APL_XDCI		0x5aaa
@@ -3436,6 +3473,7 @@
 #define PCI_DEVICE_ID_INTEL_CNP_H_SD		0xa375
 #define PCI_DEVICE_ID_INTEL_ICL_SD		0x34f8
 #define PCI_DEVICE_ID_INTEL_CMP_SD		0x02f5
+#define PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SD	0x38f8
 
 /* Intel EMMC device Ids */
 #define PCI_DEVICE_ID_INTEL_SKL_EMMC		0x9d2b
@@ -3514,7 +3552,6 @@
 #define PCI_DEVICE_ID_ADAPTEC_7887	0x8778
 #define PCI_DEVICE_ID_ADAPTEC_7888	0x8878
 #define PCI_DEVICE_ID_ADAPTEC_1030	0x8b78
-
 #define PCI_VENDOR_ID_ADAPTEC2		0x9005
 #define PCI_DEVICE_ID_ADAPTEC2_2940U2	0x0010
 #define PCI_DEVICE_ID_ADAPTEC2_2930U2	0x0011

src/soc/intel/common/block/cse/cse.c

@@ -755,6 +755,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_ICL_CSE0,
 	PCI_DEVICE_ID_INTEL_CMP_CSE0,
 	PCI_DEVICE_ID_INTEL_TGL_CSE0,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_CSE0,
 	0,
 };
 

src/soc/intel/common/block/dsp/dsp.c

@@ -35,6 +35,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_CMP_AUDIO,
 	PCI_DEVICE_ID_INTEL_ICL_AUDIO,
 	PCI_DEVICE_ID_INTEL_TGL_AUDIO,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_AUDIO,
 	0,
 };
 

src/soc/intel/common/block/graphics/graphics.c

@@ -213,6 +213,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_TGL_GT2_ULT,
 	PCI_DEVICE_ID_INTEL_TGL_GT2_ULX,
 	PCI_DEVICE_ID_INTEL_TGL_GT3_ULT,
+	PCI_DEVICE_ID_INTEL_JSL_PRE_PROD_GT0,
 	0,
 };
 

src/soc/intel/common/block/i2c/i2c.c

@@ -243,6 +243,12 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_TGP_I2C5,
 	PCI_DEVICE_ID_INTEL_TGP_I2C6,
 	PCI_DEVICE_ID_INTEL_TGP_I2C7,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C0,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C1,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C2,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C3,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C4,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_I2C5,
 	0,
 };
 

src/soc/intel/common/block/lpc/lpc.c

@@ -222,6 +222,8 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_TGP_ESPI_24,
 	PCI_DEVICE_ID_INTEL_TGP_ESPI_25,
 	PCI_DEVICE_ID_INTEL_TGP_ESPI_26,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_ESPI_1,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_ESPI_2,
 	0
 };
 

src/soc/intel/common/block/p2sb/p2sb.c

@@ -180,6 +180,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_ICL_P2SB,
 	PCI_DEVICE_ID_INTEL_CMP_P2SB,
 	PCI_DEVICE_ID_INTEL_TGL_P2SB,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_P2SB,
 	0,
 };
 

src/soc/intel/common/block/pcie/pcie.c

@@ -266,6 +266,14 @@ static const unsigned short pcie_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP14,
 	PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP15,
 	PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP16,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP1,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP2,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP3,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP4,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP5,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP6,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP7,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PCIE_RP8,
 	0
 };
 

src/soc/intel/common/block/pmc/pmc.c

@@ -134,6 +134,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_ICP_PMC,
 	PCI_DEVICE_ID_INTEL_CMP_PMC,
 	PCI_DEVICE_ID_INTEL_TGP_PMC,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_PMC,
 	0
 };
 

src/soc/intel/common/block/sata/sata.c

@@ -100,6 +100,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_TGP_SATA,
 	PCI_DEVICE_ID_INTEL_TGP_PREMIUM_SATA,
 	PCI_DEVICE_ID_INTEL_TGP_COMPAT_SATA,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SATA,
 	0
 };
 

src/soc/intel/common/block/scs/sd.c

@@ -73,6 +73,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_CNP_H_SD,
 	PCI_DEVICE_ID_INTEL_ICL_SD,
 	PCI_DEVICE_ID_INTEL_CMP_SD,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SD,
 	0
 };
 

src/soc/intel/common/block/smbus/smbus.c

@@ -96,6 +96,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_ICP_LP_SMBUS,
 	PCI_DEVICE_ID_INTEL_CMP_SMBUS,
 	PCI_DEVICE_ID_INTEL_TGP_LP_SMBUS,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SMBUS,
 	0
 };
 

src/soc/intel/common/block/spi/spi.c

@@ -89,6 +89,10 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_TGP_GSPI4,
 	PCI_DEVICE_ID_INTEL_TGP_GSPI5,
 	PCI_DEVICE_ID_INTEL_TGP_GSPI6,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SPI0,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SPI1,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SPI2,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_HWSEQ_SPI,
 	0
 };
 

src/soc/intel/common/block/sram/sram.c

@@ -52,6 +52,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_ICL_SRAM,
 	PCI_DEVICE_ID_INTEL_CMP_SRAM,
 	PCI_DEVICE_ID_INTEL_TGL_SRAM,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_SRAM,
 	0,
 };
 

src/soc/intel/common/block/systemagent/systemagent.c

@@ -367,6 +367,7 @@ static const unsigned short systemagent_ids[] = {
 	PCI_DEVICE_ID_INTEL_TGL_ID_U,
 	PCI_DEVICE_ID_INTEL_TGL_ID_U_1,
 	PCI_DEVICE_ID_INTEL_TGL_ID_Y,
+	PCI_DEVICE_ID_INTEL_JSL_PRE_PROD,
 	0
 };
 

src/soc/intel/common/block/uart/uart.c

@@ -278,6 +278,9 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_TGP_UART0,
 	PCI_DEVICE_ID_INTEL_TGP_UART1,
 	PCI_DEVICE_ID_INTEL_TGP_UART2,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_UART0,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_UART1,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_UART2,
 	0,
 };
 

src/soc/intel/common/block/xhci/xhci.c

@@ -132,6 +132,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_ICP_LP_XHCI,
 	PCI_DEVICE_ID_INTEL_CMP_LP_XHCI,
 	PCI_DEVICE_ID_INTEL_TGP_LP_XHCI,
+	PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_XHCI,
 	0
 };
 

src/soc/intel/tigerlake/bootblock/report_platform.c

@@ -47,6 +47,7 @@ static struct {
 	{ PCI_DEVICE_ID_INTEL_TGL_ID_U, "Tigerlake-U-4-2" },
 	{ PCI_DEVICE_ID_INTEL_TGL_ID_U_1, "Tigerlake-U-4-3e" },
 	{ PCI_DEVICE_ID_INTEL_TGL_ID_Y, "Tigerlake-Y-4-2" },
+	{ PCI_DEVICE_ID_INTEL_JSL_PRE_PROD, "Jasperlake Pre Prod" },
 };
 
 static struct {
@@ -85,6 +86,8 @@ static struct {
 	{ PCI_DEVICE_ID_INTEL_TGP_ESPI_24, "Tigerlake-Base SKU" },
 	{ PCI_DEVICE_ID_INTEL_TGP_ESPI_25, "Tigerlake-Base SKU" },
 	{ PCI_DEVICE_ID_INTEL_TGP_ESPI_26, "Tigerlake-Base SKU" },
+	{ PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_ESPI_1, "Jasperlake Pre Prod" },
+	{ PCI_DEVICE_ID_INTEL_JSP_PRE_PROD_ESPI_2, "Jasperlake Pre Prod" },
 };
 
 static struct {
@@ -95,6 +98,7 @@ static struct {
 	{ PCI_DEVICE_ID_INTEL_TGL_GT2_ULT, "Tigerlake U GT2" },
 	{ PCI_DEVICE_ID_INTEL_TGL_GT2_ULX, "Tigerlake Y GT2" },
 	{ PCI_DEVICE_ID_INTEL_TGL_GT3_ULT, "Tigerlake U GT3" },
+	{ PCI_DEVICE_ID_INTEL_JSL_PRE_PROD_GT0, "Jasperlake Pre Prod GT0" },
 };
 
 static inline uint8_t get_dev_revision(pci_devfn_t dev)