soc/ti/am335x: Fix MLO build

Allows the AM335X to boot from the coreboot generated MLO by:

- Fixing the load address in the MLO header to be the start of SRAM
- Fixing the way that the bootblock size is calculated (which is
  embedded into the MLO so that the MLO knows how much to load into
  SRAM). The previous method relied on parsing cbfstool output - the
  output has changed format since this was originally written so this no
  longer works. Directly using the filesize of the built binary is
  probably a more stable way of doing this.

As part of this, the start addresses of SRAM and DRAM were fixed to be
consistent with the AM335x Technical Reference Manual (spruh73, rev Q).

TEST: Booted Beaglebone Black from MLO placed at offset 0x00 on an SD card

Change-Id: I514d7cda65ddcbf27e78286dc6857c9e81ce6f9e
Signed-off-by: Sam Lewis <sam.vr.lewis@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44381
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sam Lewis 2020-08-03 20:50:49 +10:00 committed by Patrick Georgi
parent f58fb59ea0
commit 266c136304
4 changed files with 9 additions and 10 deletions

View File

@ -30,17 +30,13 @@ real-target: $(obj)/MLO
header_ld := $(call src-to-obj,omap-header,$(dir)/header.ld) header_ld := $(call src-to-obj,omap-header,$(dir)/header.ld)
get_header_size= \ get_header_size= \
$(eval omap_header_info=$(shell $(CBFSTOOL) $(1) print | grep $(2))) \ $(shell echo $$(wc -c < $(objcbfs)/bootblock.bin))
$(shell echo $$(($(word 2,$(omap_header_info)) + \
$(word 4,$(omap_header_info)))))
$(obj)/omap-header.bin: $$(omap-header-objs) $(obj)/coreboot.rom $(obj)/omap-header.bin: $$(omap-header-objs) $(objcbfs)/bootblock.bin
@printf " CC $(subst $(obj)/,,$(@))\n" @printf " CC $(subst $(obj)/,,$(@))\n"
$(CC_omap-header) -nostdlib -nostartfiles -static -include $(obj)/config.h \ $(CC_omap-header) -nostdlib -nostartfiles -static -include $(obj)/config.h \
-Wl,--defsym,header_load_size=$(strip \ -Wl,--defsym,header_load_size=$(strip \
$(call get_header_size,$(obj)/coreboot.rom, \ $(call get_header_size,$(obj)/coreboot.rom) \
$(CONFIG_CBFS_PREFIX)/romstage \
) \
) \ ) \
-o $@.tmp $< -T $(header_ld) -o $@.tmp $< -T $(header_ld)
$(OBJCOPY_omap-header) --only-section=".header" -O binary $@.tmp $@ $(OBJCOPY_omap-header) --only-section=".header" -O binary $@.tmp $@

View File

@ -5,7 +5,7 @@
/* FIXME: No idea how big the internal SRAM actually is. */ /* FIXME: No idea how big the internal SRAM actually is. */
static const struct mem_region_device boot_dev = static const struct mem_region_device boot_dev =
MEM_REGION_DEV_RO_INIT(_dram, CONFIG_ROM_SIZE); MEM_REGION_DEV_RO_INIT(_sram, CONFIG_ROM_SIZE);
const struct region_device *boot_device_ro(void) const struct region_device *boot_device_ro(void)
{ {

View File

@ -52,6 +52,6 @@ struct omap_image_headers headers __attribute__((section(".header"))) = {
}, },
.image_header = { .image_header = {
.size = (uintptr_t)&header_load_size, .size = (uintptr_t)&header_load_size,
.destination = (uintptr_t)_dram .destination = (uintptr_t)_sram
} }
}; };

View File

@ -6,11 +6,14 @@
SECTIONS SECTIONS
{ {
DRAM_START(0x40000000) SRAM_START(0x402f0400)
BOOTBLOCK(0x402f0400, 20K) BOOTBLOCK(0x402f0400, 20K)
ROMSTAGE(0x402f5400, 88K) ROMSTAGE(0x402f5400, 88K)
FMAP_CACHE(0x4030b400, 2K) FMAP_CACHE(0x4030b400, 2K)
STACK(0x4030be00, 4K) STACK(0x4030be00, 4K)
SRAM_END(0x40310000)
DRAM_START(0x80000000)
RAMSTAGE(0x80200000, 192K) RAMSTAGE(0x80200000, 192K)
/* TODO: Implement MMU support and move TTB to a better location. */ /* TODO: Implement MMU support and move TTB to a better location. */