mainboard/google/{poppy,soraka}: Enable S0ix
Enable S0ix for poppy and soraka in their device trees respectively. BUG=b:36630881 BRANCH=none TEST=Verified S0ix and S3 operation on Poppy and Soraka (250+ iterations). Change-Id: I9ba91499e54f729970448af6f71804ad5b3cb836 Signed-off-by: Rajat Jain <rajatja@google.com> Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/20689 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -24,6 +24,9 @@ chip soc/intel/skylake
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# Enable DPTF
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# Enable DPTF
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register "dptf_enable" = "1"
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register "dptf_enable" = "1"
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# Enable S0ix
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register "s0ix_enable" = "1"
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# FSP Configuration
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# FSP Configuration
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register "ProbelessTrace" = "0"
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register "ProbelessTrace" = "0"
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register "EnableLan" = "0"
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register "EnableLan" = "0"
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@ -24,6 +24,9 @@ chip soc/intel/skylake
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# Enable DPTF
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# Enable DPTF
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register "dptf_enable" = "1"
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register "dptf_enable" = "1"
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# Enable S0ix
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register "s0ix_enable" = "1"
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# FSP Configuration
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# FSP Configuration
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register "ProbelessTrace" = "0"
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register "ProbelessTrace" = "0"
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register "EnableLan" = "0"
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register "EnableLan" = "0"
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