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mainboard/google/{poppy,soraka}: Enable S0ix 

Enable S0ix for poppy and soraka in their device trees respectively.

BUG=b:36630881
BRANCH=none
TEST=Verified S0ix and S3 operation on Poppy and Soraka (250+ iterations).

Change-Id: I9ba91499e54f729970448af6f71804ad5b3cb836
Signed-off-by: Rajat Jain <rajatja@google.com>
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/20689
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Rajat Jain 2017-07-20 19:31:01 -07:00 committed by Furquan Shaikh
parent 9aa45e6952
commit 2671afcbbc
2 changed files with 6 additions and 0 deletions
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3
src/mainboard/google/poppy/variants/baseboard/devicetree.cb
View File

@ -24,6 +24,9 @@ chip soc/intel/skylake
# Enable DPTF
register "dptf_enable" = "1"
# Enable S0ix
register "s0ix_enable" = "1"
# FSP Configuration
register "ProbelessTrace" = "0"
register "EnableLan" = "0"

3
src/mainboard/google/poppy/variants/soraka/devicetree.cb
View File

@ -24,6 +24,9 @@ chip soc/intel/skylake
# Enable DPTF
register "dptf_enable" = "1"
# Enable S0ix
register "s0ix_enable" = "1"
# FSP Configuration
register "ProbelessTrace" = "0"
register "EnableLan" = "0"