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MMCONF_SUPPORT: Drop redundant logging 

Resource is actually stored even before read_resources, but
that's where we currently log this resource.

For Intel, use PCI config register offset as the resource
index, while AMD side uses MSR address.

Change-Id: I6eeef1883c5d1ee5bbcebd1731c0e356af3fd781
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17696
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki 2016-12-02 14:38:13 +02:00
parent e25b5ef39f
commit 27198ac2e3
17 changed files with 10 additions and 140 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/northbridge/amd/agesa/family10/northbridge.c
View File

@ -537,11 +537,6 @@ static void amdfam10_set_resources(device_t dev)
assign_resources(bus);
}
}
res = find_resource(dev, 0xc0010058);
if (res) {
report_resource_stored(dev, res, " <mmconfig>");
}
}
static void mcf0_control_init(struct device *dev)

6
src/northbridge/amd/agesa/family12/northbridge.c
View File

@ -662,13 +662,9 @@ static void cpu_bus_read_resources(device_t dev)
static void cpu_bus_set_resources(device_t dev)
{
struct resource *resource = find_resource(dev, 0xc0010058);
printk(BIOS_DEBUG, "\nFam12h - northbridge.c - %s - Start.\n",__func__);
if (resource) {
report_resource_stored(dev, resource, " <mmconfig>");
}
pci_dev_set_resources(dev);
printk(BIOS_DEBUG, "Fam12h - northbridge.c - %s - End.\n",__func__);
}

6
src/northbridge/amd/agesa/family14/northbridge.c
View File

@ -412,12 +412,6 @@ static void nb_set_resources(device_t dev)
assign_resources(bus);
}
}
/* Print the MMCONF region if it has been reserved. */
res = find_resource(dev, 0xc0010058);
if (res) {
report_resource_stored(dev, res, " <mmconfig>");
}
}
/* Domain/Root Complex related code */

6
src/northbridge/amd/agesa/family15/northbridge.c
View File

@ -429,12 +429,6 @@ static void nb_set_resources(device_t dev)
assign_resources(bus);
}
}
/* Print the MMCONF region if it has been reserved. */
res = find_resource(dev, 0xc0010058);
if (res) {
report_resource_stored(dev, res, " <mmconfig>");
}
}
static void scan_chains(device_t dev)

6
src/northbridge/amd/agesa/family15rl/northbridge.c
View File

@ -429,12 +429,6 @@ static void set_resources(struct device *dev)
assign_resources(bus);
}
}
/* Print the MMCONF region if it has been reserved. */
res = find_resource(dev, 0xc0010058);
if (res) {
report_resource_stored(dev, res, " <mmconfig>");
}
}
static unsigned long acpi_fill_hest(acpi_hest_t *hest)

6
src/northbridge/amd/agesa/family15tn/northbridge.c
View File

@ -428,12 +428,6 @@ static void nb_set_resources(device_t dev)
assign_resources(bus);
}
}
/* Print the MMCONF region if it has been reserved. */
res = find_resource(dev, 0xc0010058);
if (res) {
report_resource_stored(dev, res, " <mmconfig>");
}
}

6
src/northbridge/amd/agesa/family16kb/northbridge.c
View File

@ -428,12 +428,6 @@ static void set_resources(device_t dev)
assign_resources(bus);
}
}
/* Print the MMCONF region if it has been reserved. */
res = find_resource(dev, 0xc0010058);
if (res) {
report_resource_stored(dev, res, " <mmconfig>");
}
}

4
src/northbridge/amd/amdfam10/northbridge.c
View File

@ -1957,10 +1957,6 @@ static void cpu_bus_init(device_t dev)
static void cpu_bus_set_resources(struct device *dev)
{
struct resource *resource = find_resource(dev, 0xc0010058);
if (resource) {
report_resource_stored(dev, resource, " <mmconfig>");
}
pci_dev_set_resources(dev);
}

6
src/northbridge/amd/pi/00630F01/northbridge.c
View File

@ -431,12 +431,6 @@ static void set_resources(device_t dev)
assign_resources(bus);
}
}
/* Print the MMCONF region if it has been reserved. */
res = find_resource(dev, 0xc0010058);
if (res) {
report_resource_stored(dev, res, " <mmconfig>");
}
}
static unsigned long acpi_fill_hest(acpi_hest_t *hest)

4
src/northbridge/amd/pi/00660F01/northbridge.c
View File

@ -1094,10 +1094,6 @@ static void cpu_bus_read_resources(device_t dev)
static void cpu_bus_set_resources(device_t dev)
{
struct resource *resource = find_resource(dev, 0xc0010058);
if (resource) {
report_resource_stored(dev, resource, " <mmconfig>");
}
pci_dev_set_resources(dev);
}

4
src/northbridge/amd/pi/00670F00/northbridge.c
View File

@ -1095,10 +1095,6 @@ static void cpu_bus_read_resources(device_t dev)
static void cpu_bus_set_resources(device_t dev)
{
struct resource *resource = find_resource(dev, 0xc0010058);
if (resource) {
report_resource_stored(dev, resource, " <mmconfig>");
}
pci_dev_set_resources(dev);
}

4
src/northbridge/amd/pi/00730F01/northbridge.c
View File

@ -1114,10 +1114,6 @@ static void cpu_bus_read_resources(device_t dev)
static void cpu_bus_set_resources(device_t dev)
{
struct resource *resource = find_resource(dev, 0xc0010058);
if (resource) {
report_resource_stored(dev, resource, " <mmconfig>");
}
pci_dev_set_resources(dev);
}

19
src/northbridge/intel/fsp_sandybridge/northbridge.c
View File

@ -244,28 +244,13 @@ static void mc_read_resources(device_t dev)
pci_dev_read_resources(dev);
/* We use 0xcf as an unused index for our PCIe bar so that we find it again */
buses = get_pcie_bar(&pcie_config_base);
if (buses) {
struct resource *resource = new_resource(dev, 0xcf);
struct resource *resource = new_resource(dev, PCIEXBAR);
mmconf_resource_init(resource, pcie_config_base, buses);
}
}
static void mc_set_resources(device_t dev)
{
struct resource *resource;
/* Report the PCIe BAR */
resource = find_resource(dev, 0xcf);
if (resource) {
report_resource_stored(dev, resource, "<mmconfig>");
}
/* And call the normal set_resources */
pci_dev_set_resources(dev);
}
static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
{
if (!vendor || !device) {
@ -319,7 +304,7 @@ static struct pci_operations intel_pci_ops = {
static struct device_operations mc_ops = {
.read_resources = mc_read_resources,
.set_resources = mc_set_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = northbridge_init,
.scan_bus = 0,

15
src/northbridge/intel/i3100/northbridge.c
View File

@ -138,18 +138,7 @@ static void mc_read_resources(device_t dev)
{
pci_dev_read_resources(dev);
mmconf_resource(dev, 0xcf);
}
static void mc_set_resources(device_t dev)
{
struct resource *resource;
resource = find_resource(dev, 0xcf);
if (resource) {
report_resource_stored(dev, resource, "<mmconfig>");
}
pci_dev_set_resources(dev);
mmconf_resource(dev, EXPECBASE);
}
static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
@ -188,7 +177,7 @@ static struct pci_operations intel_pci_ops = {
static struct device_operations mc_ops = {
.read_resources = mc_read_resources,
.set_resources = mc_set_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = 0,
.scan_bus = 0,

19
src/northbridge/intel/i945/northbridge.c
View File

@ -157,28 +157,13 @@ static void mc_read_resources(device_t dev)
pci_dev_read_resources(dev);
/* We use 0xcf as an unused index for our PCIe bar so that we find it again */
buses = get_pcie_bar(&pcie_config_base);
if (buses) {
struct resource *resource = new_resource(dev, 0xcf);
struct resource *resource = new_resource(dev, PCIEXBAR);
mmconf_resource_init(resource, pcie_config_base, buses);
}
}
static void mc_set_resources(device_t dev)
{
struct resource *resource;
/* Report the PCIe BAR */
resource = find_resource(dev, 0xcf);
if (resource) {
report_resource_stored(dev, resource, "<mmconfig>");
}
/* And call the normal set_resources */
pci_dev_set_resources(dev);
}
static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
{
if (!vendor || !device) {
@ -216,7 +201,7 @@ static struct pci_operations intel_pci_ops = {
static struct device_operations mc_ops = {
.read_resources = mc_read_resources,
.set_resources = mc_set_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.acpi_fill_ssdt_generator = generate_cpu_entries,
#if CONFIG_HAVE_ACPI_RESUME

19
src/northbridge/intel/sandybridge/northbridge.c
View File

@ -264,28 +264,13 @@ static void mc_read_resources(device_t dev)
pci_dev_read_resources(dev);
/* We use 0xcf as an unused index for our PCIe bar so that we find it again */
buses = get_pcie_bar(&pcie_config_base);
if (buses) {
struct resource *resource = new_resource(dev, 0xcf);
struct resource *resource = new_resource(dev, PCIEXBAR);
mmconf_resource_init(resource, pcie_config_base, buses);
}
}
static void mc_set_resources(device_t dev)
{
struct resource *resource;
/* Report the PCIe BAR */
resource = find_resource(dev, 0xcf);
if (resource) {
report_resource_stored(dev, resource, "<mmconfig>");
}
/* And call the normal set_resources */
pci_dev_set_resources(dev);
}
static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
{
if (!vendor || !device) {
@ -474,7 +459,7 @@ static struct pci_operations intel_pci_ops = {
static struct device_operations mc_ops = {
.read_resources = mc_read_resources,
.set_resources = mc_set_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = northbridge_init,
.scan_bus = 0,

15
src/soc/intel/sch/northbridge.c
View File

@ -201,19 +201,6 @@ static void mc_read_resources(device_t dev)
}
}
static void mc_set_resources(device_t dev)
{
struct resource *resource;
/* Report the PCIe BAR. */
resource = find_resource(dev, 0xcf);
if (resource)
report_resource_stored(dev, resource, "<mmconfig>");
/* And call the normal set_resources. */
pci_dev_set_resources(dev);
}
static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
{
if (!vendor || !device) {
@ -231,7 +218,7 @@ static struct pci_operations intel_pci_ops = {
static struct device_operations mc_ops = {
.read_resources = mc_read_resources,
.set_resources = mc_set_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.acpi_fill_ssdt_generator = generate_cpu_entries,
.scan_bus = 0,