soc/intel/adl: Select CSE defined ME spec version for alderlake
Alderlake based SoCs uses Intel's Management Engine (ME), version 16. This patch selects ME 16 specification defined at common code and removes alderlake SoC specific ME code and data structures. BUG=b:260309647 Test=Build verified for brya. Signed-off-by: Dinesh Gehlot <digehlot@google.com> Change-Id: I94cb8a9cbb6167d1a11a012efbd6a135a8692969 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73135 Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Dinesh Gehlot
Lean Sheng Tan
parent
829e8e65b9
commit
272c9c07bd
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@ -105,6 +105,7 @@ config CPU_SPECIFIC_OPTIONS
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select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC
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select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC
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select SOC_INTEL_COMMON_BLOCK_IPU if !SOC_INTEL_ALDERLAKE_PCH_S
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select SOC_INTEL_COMMON_BLOCK_IPU if !SOC_INTEL_ALDERLAKE_PCH_S
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select SOC_INTEL_COMMON_BLOCK_IRQ
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select SOC_INTEL_COMMON_BLOCK_IRQ
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select SOC_INTEL_COMMON_BLOCK_ME_SPEC_16
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select SOC_INTEL_COMMON_BLOCK_MEMINIT
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select SOC_INTEL_COMMON_BLOCK_MEMINIT
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select SOC_INTEL_COMMON_BLOCK_PCIE_RTD3
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select SOC_INTEL_COMMON_BLOCK_PCIE_RTD3
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select SOC_INTEL_COMMON_BLOCK_PMC_EPOC
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select SOC_INTEL_COMMON_BLOCK_PMC_EPOC
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@ -33,7 +33,6 @@ ramstage-y += fsp_params.c
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ramstage-y += graphics.c
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ramstage-y += graphics.c
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ramstage-y += hsphy.c
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ramstage-y += hsphy.c
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ramstage-y += lockdown.c
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ramstage-y += lockdown.c
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ramstage-y += me.c
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ramstage-y += p2sb.c
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ramstage-y += p2sb.c
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ramstage-y += pcie_rp.c
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ramstage-y += pcie_rp.c
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ramstage-y += pmc.c
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ramstage-y += pmc.c
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@ -1,81 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _ALDERLAKE_ME_H_
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#define _ALDERLAKE_ME_H_
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/* ME Host Firmware Status register 1 */
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union me_hfsts1 {
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uint32_t data;
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struct {
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uint32_t working_state : 4;
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uint32_t mfg_mode : 1;
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uint32_t fpt_bad : 1;
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uint32_t operation_state : 3;
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uint32_t fw_init_complete : 1;
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uint32_t ft_bup_ld_flr : 1;
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uint32_t update_in_progress : 1;
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uint32_t error_code : 4;
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uint32_t operation_mode : 4;
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uint32_t reserved_0 : 4;
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uint32_t boot_options_present : 1;
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uint32_t invoke_enhance_dbg_mode: 1;
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uint32_t reserved_1 : 5;
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uint32_t d0i3_support_valid : 1;
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} __packed fields;
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};
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/* Host Firmware Status Register 2 */
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union me_hfsts2 {
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uint32_t data;
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struct {
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uint32_t reserved_0 : 4;
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uint32_t cpu_replaced : 1;
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uint32_t reserved_1 : 3;
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uint32_t cpu_replaced_valid : 1;
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uint32_t low_power_state : 1;
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uint32_t reserved_2 : 22;
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} __packed fields;
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};
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/* ME Host Firmware Status Register 3 */
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union me_hfsts3 {
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uint32_t data;
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struct {
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uint32_t reserved_0 : 4;
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uint32_t fw_sku : 3;
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uint32_t reserved_1 : 25;
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} __packed fields;
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};
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/* Host Firmware Status Register 4 */
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union me_hfsts4 {
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uint32_t data;
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struct {
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uint32_t rsvd0;
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} __packed fields;
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};
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/* Host Firmware Status Register 5 */
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union me_hfsts5 {
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uint32_t data;
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struct {
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uint32_t rsvd0;
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} __packed fields;
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};
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/* Host Firmware Status Register 6 */
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union me_hfsts6 {
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u32 data;
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struct {
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uint32_t reserved_0 : 1;
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uint32_t cpu_debug_disable : 1;
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uint32_t reserved_1 : 19;
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uint32_t manuf_lock : 1;
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uint32_t reserved_2 : 8;
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uint32_t fpf_soc_lock : 1;
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uint32_t txt_support : 1;
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} __packed fields;
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};
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#endif /* _ALDERLAKE_ME_H_ */
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@ -1,98 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <bootstate.h>
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#include <intelblocks/cse.h>
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#include <console/console.h>
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#include <soc/me.h>
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#include <stdint.h>
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static bool is_manuf_mode(union me_hfsts1 hfsts1, union me_hfsts6 hfsts6)
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{
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/*
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* ME manufacturing mode is disabled if the descriptor is locked, fuses
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* are programmed and manufacturing variables are locked.
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*/
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return !((hfsts1.fields.mfg_mode == 0) &&
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(hfsts6.fields.fpf_soc_lock == 1) &&
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(hfsts6.fields.manuf_lock == 1));
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}
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static void dump_me_status(void *unused)
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{
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union me_hfsts1 hfsts1;
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union me_hfsts2 hfsts2;
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union me_hfsts3 hfsts3;
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union me_hfsts4 hfsts4;
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union me_hfsts5 hfsts5;
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union me_hfsts6 hfsts6;
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bool manuf_mode;
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if (!is_cse_enabled())
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return;
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hfsts1.data = me_read_config32(PCI_ME_HFSTS1);
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hfsts2.data = me_read_config32(PCI_ME_HFSTS2);
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hfsts3.data = me_read_config32(PCI_ME_HFSTS3);
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hfsts4.data = me_read_config32(PCI_ME_HFSTS4);
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hfsts5.data = me_read_config32(PCI_ME_HFSTS5);
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hfsts6.data = me_read_config32(PCI_ME_HFSTS6);
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printk(BIOS_DEBUG, "ME: HFSTS1 : 0x%08X\n", hfsts1.data);
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printk(BIOS_DEBUG, "ME: HFSTS2 : 0x%08X\n", hfsts2.data);
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printk(BIOS_DEBUG, "ME: HFSTS3 : 0x%08X\n", hfsts3.data);
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printk(BIOS_DEBUG, "ME: HFSTS4 : 0x%08X\n", hfsts4.data);
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printk(BIOS_DEBUG, "ME: HFSTS5 : 0x%08X\n", hfsts5.data);
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printk(BIOS_DEBUG, "ME: HFSTS6 : 0x%08X\n", hfsts6.data);
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manuf_mode = is_manuf_mode(hfsts1, hfsts6);
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printk(BIOS_DEBUG, "ME: Manufacturing Mode : %s\n",
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manuf_mode ? "YES" : "NO");
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/*
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* The SPI Protection Mode bit reflects SPI descriptor
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* locked(0) or unlocked(1).
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*/
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printk(BIOS_DEBUG, "ME: SPI Protection Mode Enabled : %s\n",
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hfsts1.fields.mfg_mode ? "NO" : "YES");
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printk(BIOS_DEBUG, "ME: FPFs Committed : %s\n",
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hfsts6.fields.fpf_soc_lock ? "YES" : "NO");
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printk(BIOS_DEBUG, "ME: Manufacturing Vars Locked : %s\n",
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hfsts6.fields.manuf_lock ? "YES" : "NO");
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printk(BIOS_DEBUG, "ME: FW Partition Table : %s\n",
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hfsts1.fields.fpt_bad ? "BAD" : "OK");
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printk(BIOS_DEBUG, "ME: Bringup Loader Failure : %s\n",
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hfsts1.fields.ft_bup_ld_flr ? "YES" : "NO");
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printk(BIOS_DEBUG, "ME: Firmware Init Complete : %s\n",
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hfsts1.fields.fw_init_complete ? "YES" : "NO");
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printk(BIOS_DEBUG, "ME: Boot Options Present : %s\n",
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hfsts1.fields.boot_options_present ? "YES" : "NO");
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printk(BIOS_DEBUG, "ME: Update In Progress : %s\n",
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hfsts1.fields.update_in_progress ? "YES" : "NO");
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printk(BIOS_DEBUG, "ME: D0i3 Support : %s\n",
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hfsts1.fields.d0i3_support_valid ? "YES" : "NO");
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printk(BIOS_DEBUG, "ME: Low Power State Enabled : %s\n",
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hfsts2.fields.low_power_state ? "YES" : "NO");
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printk(BIOS_DEBUG, "ME: CPU Replaced : %s\n",
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hfsts2.fields.cpu_replaced ? "YES" : "NO");
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printk(BIOS_DEBUG, "ME: CPU Replacement Valid : %s\n",
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hfsts2.fields.cpu_replaced_valid ? "YES" : "NO");
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printk(BIOS_DEBUG, "ME: Current Working State : %u\n",
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hfsts1.fields.working_state);
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printk(BIOS_DEBUG, "ME: Current Operation State : %u\n",
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hfsts1.fields.operation_state);
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printk(BIOS_DEBUG, "ME: Current Operation Mode : %u\n",
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hfsts1.fields.operation_mode);
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printk(BIOS_DEBUG, "ME: Error Code : %u\n",
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hfsts1.fields.error_code);
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printk(BIOS_DEBUG, "ME: Enhanced Debug Mode : %s\n",
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hfsts1.fields.invoke_enhance_dbg_mode ? "YES" : "NO");
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printk(BIOS_DEBUG, "ME: CPU Debug Disabled : %s\n",
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hfsts6.fields.cpu_debug_disable ? "YES" : "NO");
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printk(BIOS_DEBUG, "ME: TXT Support : %s\n",
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hfsts6.fields.txt_support ? "YES" : "NO");
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if (CONFIG(SOC_INTEL_CSE_LITE_SKU))
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cse_log_ro_write_protection_info(manuf_mode);
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}
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BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_EXIT, print_me_fw_version, NULL);
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BOOT_STATE_INIT_ENTRY(BS_OS_RESUME_CHECK, BS_ON_EXIT, dump_me_status, NULL);
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