src/soc: Add missing 'include <types.h>'

<types.h> is supposed to provide <stdint.h> and <stddef.h>.
When <types.h> is included, <stdint.h> and/or <stddef.h> is removed.

Change-Id: I2db0a647bc657a3626cb5e78f23e9198e290261a
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32810
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>

src/soc/amd/common/block/include/amdblocks/psp.h

@@ -18,7 +18,7 @@
 
 #include <amdblocks/agesawrapper.h>
 #include <soc/pci_devs.h>
-#include <stdint.h>
+#include <types.h>
 
 /* Extra, Special Purpose Registers in the PSP PCI Config Space */
 

src/soc/amd/stoneyridge/include/soc/northbridge.h

@@ -18,6 +18,7 @@
 #define __PI_STONEYRIDGE_NORTHBRIDGE_H__
 
 #include <device/device.h>
+#include <types.h>
 
 /* D0F0 - Root Complex */
 

src/soc/amd/stoneyridge/southbridge.c

@@ -14,7 +14,6 @@
  */
 
 #include <console/console.h>
-
 #include <device/mmio.h>
 #include <bootstate.h>
 #include <cpu/x86/smm.h>
@@ -36,6 +35,7 @@
 #include <soc/pci_devs.h>
 #include <agesa_headers.h>
 #include <soc/nvs.h>
+#include <types.h>
 
 /*
  * Table of devices that need their AOAC registers enabled and waited

src/soc/intel/apollolake/graphics.c

@@ -26,6 +26,7 @@
 #include <intelblocks/graphics.h>
 #include <drivers/intel/gma/opregion.h>
 #include <drivers/intel/gma/libgfxinit.h>
+#include <types.h>
 
 uintptr_t fsp_soc_get_igd_bar(void)
 {

src/soc/intel/baytrail/gfx.c

@@ -28,6 +28,7 @@
 #include <soc/pci_devs.h>
 #include <soc/ramstage.h>
 #include <cbmem.h>
+#include <types.h>
 
 #include "chip.h"
 

src/soc/intel/broadwell/igd.c

@@ -36,6 +36,7 @@
 #include <soc/intel/broadwell/chip.h>
 #include <security/vboot/vbnv.h>
 #include <soc/igd.h>
+#include <types.h>
 
 #define GT_RETRY		1000
 enum {

src/soc/intel/cannonlake/graphics.c

@@ -23,6 +23,7 @@
 #include <drivers/intel/gma/i915_reg.h>
 #include <drivers/intel/gma/opregion.h>
 #include <intelblocks/graphics.h>
+#include <types.h>
 
 uintptr_t fsp_soc_get_igd_bar(void)
 {

src/soc/intel/icelake/graphics.c

@@ -23,6 +23,7 @@
 #include <drivers/intel/gma/i915_reg.h>
 #include <drivers/intel/gma/opregion.h>
 #include <intelblocks/graphics.h>
+#include <types.h>
 
 uintptr_t fsp_soc_get_igd_bar(void)
 {

src/soc/intel/skylake/graphics.c

@@ -25,6 +25,7 @@
 #include <drivers/intel/gma/opregion.h>
 #include <soc/nvs.h>
 #include <soc/ramstage.h>
+#include <types.h>
 
 uintptr_t fsp_soc_get_igd_bar(void)
 {

src/soc/mediatek/common/pll.c

@@ -16,6 +16,7 @@
 #include <device/mmio.h>
 #include <assert.h>
 #include <soc/pll.h>
+#include <types.h>
 
 #define GENMASK(h, l) (BIT(h + 1) - BIT(l))
 

src/soc/mediatek/mt8173/ddp.c

@@ -19,6 +19,7 @@
 #include <stddef.h>
 #include <soc/addressmap.h>
 #include <soc/ddp.h>
+#include <types.h>
 
 #define RDMA_FIFO_PSEUDO_SIZE(bytes)            (((bytes) / 16) << 16)
 #define RDMA_OUTPUT_VALID_FIFO_THRESHOLD(bytes) ((bytes) / 16)

src/soc/mediatek/mt8173/pll.c

@@ -16,11 +16,10 @@
 #include <device/mmio.h>
 #include <assert.h>
 #include <delay.h>
-#include <stddef.h>
-
 #include <soc/addressmap.h>
 #include <soc/infracfg.h>
 #include <soc/pll.h>
+#include <types.h>
 
 enum mux_id {
 	TOP_AXI_SEL,

src/soc/mediatek/mt8173/rtc.c

@@ -18,6 +18,7 @@
 #include <soc/rtc.h>
 #include <soc/mt6391.h>
 #include <soc/pmic_wrap.h>
+#include <types.h>
 
 #define RTC_GPIO_USER_MASK	  ((1 << 13) - (1 << 8))
 

src/soc/nvidia/tegra210/dsi.c

@@ -12,9 +12,10 @@
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  */
+
+#include <commonlib/helpers.h>
 #include <console/console.h>
 #include <device/mmio.h>
-#include <stdint.h>
 #include <stdlib.h>
 #include <delay.h>
 #include <timer.h>
@@ -24,14 +25,15 @@
 #include <edid.h>
 #include <soc/nvidia/tegra/types.h>
 #include <soc/nvidia/tegra/dc.h>
-#include "chip.h"
 #include <soc/display.h>
 #include <soc/mipi_dsi.h>
 #include <soc/mipi_display.h>
 #include <soc/tegra_dsi.h>
 #include <soc/mipi-phy.h>
+#include <types.h>
+
+#include "chip.h"
 #include "jdi_25x18_display/panel-jdi-lpm102a188a.h"
-#include <commonlib/helpers.h>
 
 struct tegra_mipi_device mipi_device_data[NUM_DSI];
 

src/soc/nvidia/tegra210/include/soc/dma.h

@@ -19,6 +19,7 @@
 
 #include <inttypes.h>
 #include <soc/addressmap.h>
+#include <types.h>
 
 /*
  * The DMA engine operates on 4 bytes at a time, so make sure any data

src/soc/nvidia/tegra210/mipi-phy.c

@@ -13,9 +13,7 @@
  * GNU General Public License for more details.
  */
 
-#include <stdint.h>
 #include <stdlib.h>
-
 #include <soc/addressmap.h>
 #include <soc/clock.h>
 #include <device/device.h>
@@ -25,6 +23,7 @@
 #include <soc/mipi_display.h>
 #include <soc/tegra_dsi.h>
 #include <soc/mipi-phy.h>
+#include <types.h>
 
 int mipi_dphy_set_timing(struct tegra_dsi *dsi)
 {

src/soc/nvidia/tegra210/spi.c

@@ -26,9 +26,8 @@
 #include <soc/addressmap.h>
 #include <soc/dma.h>
 #include <soc/spi.h>
-#include <stdint.h>
-#include <stdlib.h>
 #include <symbols.h>
+#include <types.h>
 
 #if defined(CONFIG_DEBUG_SPI) && CONFIG_DEBUG_SPI
 # define DEBUG_SPI(x,...)	printk(BIOS_DEBUG, "TEGRA_SPI: " x)

src/soc/qualcomm/ipq806x/include/soc/clock.h

@@ -34,6 +34,7 @@
 #define __IPQ860X_CLOCK_H_
 
 #include <soc/iomap.h>
+#include <types.h>
 
 /* UART clock @ 7.3728 MHz */
 #define UART_DM_CLK_RX_TX_BIT_RATE 0xCC

src/soc/rockchip/common/gpio.c

@@ -20,6 +20,7 @@
 #include <soc/grf.h>
 #include <soc/soc.h>
 #include <stdlib.h>
+#include <types.h>
 
 static void gpio_set_dir(gpio_t gpio, enum gpio_dir dir)
 {

src/soc/rockchip/rk3399/include/soc/mipi.h

@@ -17,6 +17,7 @@
 #define __RK_MIPI_H
 
 #include <stdlib.h>
+#include <types.h>
 
 struct rk_mipi_regs {
 	u32 dsi_version;

src/soc/rockchip/rk3399/mipi.c

@@ -20,13 +20,13 @@
 #include <edid.h>
 #include <gpio.h>
 #include <stdlib.h>
-#include <stdint.h>
 #include <string.h>
 #include <soc/addressmap.h>
 #include <soc/clock.h>
 #include <soc/display.h>
 #include <soc/mipi.h>
 #include <soc/soc.h>
+#include <types.h>
 #include <timer.h>
 
 static struct rk_mipi_dsi rk_mipi[2] = {