allwinner/a10: Hide SoC specific UART functions

If platform has a component coreboot has to communicate with using
one of the UARTs, that device would not be part of the SoC and
must not use functions specific to a10 UART.

Change-Id: Ifacfc94dfde9979eae0b0cfb723a6eaa1fbcd659
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5469
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>

src/cpu/allwinner/a10/uart.c

@@ -13,12 +13,11 @@
 /**
  * \brief Configure line control settings for UART
  */
-void a10_uart_configure(void *uart_base, u32 baud_rate, u8 data_bits,
+static void a10_uart_configure(struct a10_uart *uart, u32 baud_rate, u8 data_bits,
 			enum uart_parity parity, u8 stop_bits)
 {
 	u32 reg32;
 	u16 div;
-	struct a10_uart *uart = uart_base;
 
 	div = (u16) uart_baudrate_divisor(baud_rate,
 		uart_platform_refclk(), 16);
@@ -44,10 +43,8 @@ void a10_uart_configure(void *uart_base, u32 baud_rate, u8 data_bits,
 	write32(reg32, &uart->lcr);
 }
 
-void a10_uart_enable_fifos(void *uart_base)
+static void a10_uart_enable_fifos(struct a10_uart *uart)
 {
-	struct a10_uart *uart = uart_base;
-
 	write32(UART_FCR_FIFO_EN, &uart->fcr);
 }
 
@@ -70,10 +67,8 @@ static int rx_fifo_empty(struct a10_uart *uart)
  *
  * Blocks until at least a byte is available.
  */
-u8 a10_uart_rx_blocking(void *uart_base)
+static u8 a10_uart_rx_blocking(struct a10_uart *uart)
 {
-	struct a10_uart *uart = uart_base;
-
 	while (rx_fifo_empty(uart)) ;
 
 	return read32(&uart->rbr);
@@ -84,11 +79,34 @@ u8 a10_uart_rx_blocking(void *uart_base)
  *
  * Blocks until there is space in the FIFO.
  */
-void a10_uart_tx_blocking(void *uart_base, u8 data)
+static void a10_uart_tx_blocking(struct a10_uart *uart, u8 data)
 {
-	struct a10_uart *uart = uart_base;
-
 	while (tx_fifo_full(uart)) ;
 
 	return write32(data, &uart->thr);
 }
+
+
+void uart_init(int idx)
+{
+	struct a10_uart *uart_base = uart_platform_baseptr(idx);
+
+	/* Use default 8N1 encoding */
+	a10_uart_configure(uart_base, default_baudrate(),
+		8, UART_PARITY_NONE, 1);
+	a10_uart_enable_fifos(uart_base);
+}
+
+unsigned char uart_rx_byte(int idx)
+{
+	return a10_uart_rx_blocking(uart_platform_baseptr(idx));
+}
+
+void uart_tx_byte(int idx, unsigned char data)
+{
+	a10_uart_tx_blocking(uart_platform_baseptr(idx), data);
+}
+
+void uart_tx_flush(int idx)
+{
+}

src/cpu/allwinner/a10/uart.h

@@ -13,7 +13,6 @@
 #ifndef CPU_ALLWINNER_A10_UART_H
 #define CPU_ALLWINNER_A10_UART_H
 
-#include "memmap.h"
 #include <types.h>
 
 struct a10_uart {
@@ -68,10 +67,4 @@ enum uart_parity {
 	UART_PARITY_ODD,
 };
 
-void a10_uart_configure(void *uart_base, u32 baud_rate, u8 data_bits,
-			enum uart_parity parity, u8 stop_bits);
-void a10_uart_enable_fifos(void *uart_base);
-u8 a10_uart_rx_blocking(void *uart_base);
-void a10_uart_tx_blocking(void *uart_base, u8 data);
-
 #endif				/* CPU_ALLWINNER_A10_UART_H */

src/cpu/allwinner/a10/uart_console.c

@@ -6,13 +6,11 @@
  * Subject to the GNU GPL v2, or (at your option) any later version.
  */
 
-#include <config.h>
 #include <types.h>
 #include <console/uart.h>
-#include <arch/io.h>
 #include <boot/coreboot_tables.h>
 
-#include <cpu/allwinner/a10/uart.h>
+#include "memmap.h"
 
 unsigned int uart_platform_base(int idx)
 {
@@ -29,30 +27,6 @@ unsigned int uart_platform_refclk(void)
 	return 24000000;
 }
 
-void uart_init(int idx)
-{
-	void *uart_base = uart_platform_baseptr(idx);
-
-	/* Use default 8N1 encoding */
-	a10_uart_configure(uart_base, default_baudrate(),
-		8, UART_PARITY_NONE, 1);
-	a10_uart_enable_fifos(uart_base);
-}
-
-unsigned char uart_rx_byte(int idx)
-{
-	return a10_uart_rx_blocking(uart_platform_baseptr(idx));
-}
-
-void uart_tx_byte(int idx, unsigned char data)
-{
-	a10_uart_tx_blocking(uart_platform_baseptr(idx), data);
-}
-
-void uart_tx_flush(int idx)
-{
-}
-
 #ifndef __PRE_RAM__
 void uart_fill_lb(void *data)
 {