vc/amd/fsp/sabrina/UsbUpd: update USB settings structure to match FSP

This file started as a copy from Cezanne. Sabrina has less USB ports
than Cezanne. Also the struct definition of fch_usb2_phy has changed and
FSP_USB_STRUCT_MINOR_VERSION is also updated.

TEST=None

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I1ef2b62373b178d729b3230d0d8539986cc631ae
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64129
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Felix Held 2022-05-06 17:43:44 +02:00 committed by Tim Wawrzynczak
parent 3654c779f7
commit 28d012fc4c
1 changed files with 19 additions and 16 deletions

View File

@ -4,14 +4,17 @@
#include <FspUpd.h> #include <FspUpd.h>
#define FSP_USB_STRUCT_MAJOR_VERSION 0xd #define FSP_USB_STRUCT_MAJOR_VERSION 0xd
#define FSP_USB_STRUCT_MINOR_VERSION 0x6 #define FSP_USB_STRUCT_MINOR_VERSION 0xe
#define USB2_PORT_COUNT 8 #define USB2_PORT_COUNT 6
#define USB3_PORT_COUNT 4 #define USB3_PORT_COUNT 3
#define USBC_COMBO_PHY_COUNT 2 #define USBC_COMBO_PHY_COUNT 2
struct fch_usb2_phy { struct fch_usb2_phy {
uint8_t compdstune; ///< COMPDSTUNE uint8_t compdistune; ///< COMPDISTUNE
uint8_t pllbtune; ///< PLLBTUNE
uint8_t pllitune; ///< PLLITUNE
uint8_t pllptune; ///< PLLPTUNE
uint8_t sqrxtune; ///< SQRXTUNE uint8_t sqrxtune; ///< SQRXTUNE
uint8_t txfslstune; ///< TXFSLSTUNE uint8_t txfslstune; ///< TXFSLSTUNE
uint8_t txpreempamptune; ///< TXPREEMPAMPTUNE uint8_t txpreempamptune; ///< TXPREEMPAMPTUNE