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Before lane reversal, 

De-asserts STRAP_BIF_all_valid for
PCIE-GFX core.
After lane reversal,
Asserts STRAP_BIF_all_valid for
PCIE-GFX core.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: QingPei Wang <wangqingpei@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6142 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Zheng Bao 2010-12-06 08:19:38 +00:00 committed by Zheng Bao
parent a8c8490c11
commit 29cb06abca
1 changed files with 4 additions and 1 deletions
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5
src/southbridge/amd/rs780/rs780_gfx.c
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@ -1302,8 +1302,10 @@ void rs780_gfx_init(device_t nb_dev, device_t dev, u32 port)
if(is_dev3_present()){
/* step 1, lane reversal (only need if CMOS option is enabled) */
if (cfg->gfx_lane_reversal) {
set_nbmisc_enable_bits(nb_dev, 0x36, 1 << 31, 1 << 31);
set_nbmisc_enable_bits(nb_dev, 0x33, 1 << 2, 1 << 2);
set_nbmisc_enable_bits(nb_dev, 0x33, 1 << 3, 1 << 3);
set_nbmisc_enable_bits(nb_dev, 0x36, 1 << 31, 0 << 31);
}
printk(BIOS_DEBUG, "rs780_gfx_init step1.\n");
/* step 1.1, dual-slot gfx configuration (only need if CMOS option is enabled) */
@ -1317,10 +1319,11 @@ void rs780_gfx_init(device_t nb_dev, device_t dev, u32 port)
}else{
if (cfg->gfx_lane_reversal) {
set_nbmisc_enable_bits(nb_dev, 0x36, 1 << 31, 1 << 31);
set_nbmisc_enable_bits(nb_dev, 0x33, 1 << 2, 1 << 2);
set_nbmisc_enable_bits(nb_dev, 0x36, 1 << 31, 0 << 31);
}
printk(BIOS_DEBUG, "rs780_gfx_init step1.\n");
printk(BIOS_DEBUG, "rs780_gfx_init step2.\n");
if((dev->path.pci.devfn >> 3) == 2)
single_port_configuration(nb_dev, dev);