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soc/intel/skylake: Add option to control microcode update inclusion 

On embedded boards the cpu mounted on the board is known. So it is not
required to include microcode for all possible Sky Lake and Kaby Lake
cpus. This patch provides the possibility to only support the versions
required.

By default all microcode updates will be included and the versions not
required can be removed using Kconfig.

BUG=N/A
TEST=build

Change-Id: Iaa36c2846b2279a2eb2b61e6c97d6c89d0736f55
Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37514
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
This commit is contained in:
Wim Vervoorn 2019-10-23 10:22:06 +02:00 committed by Patrick Georgi
parent 05fe16c4f3
commit 2ab4f4b2c5
2 changed files with 34 additions and 0 deletions
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24
src/soc/intel/skylake/Kconfig
View File

@ -288,4 +288,28 @@ config INTEL_TXT_BIOSACM_ALIGNMENT
hex
default 0x40000 # 256KB
config MAINBOARD_SUPPORTS_SKYLAKE_CPU
bool "Board can contain Skylake CPU"
default y
if SKYLAKE_SOC_PCH_H
config MAINBOARD_SUPPORTS_KABYLAKE_CPU
bool "Board can contain Kaby Lake CPU"
default y if SOC_INTEL_KABYLAKE
endif
if !SKYLAKE_SOC_PCH_H
config MAINBOARD_SUPPORTS_KABYLAKE_DUAL
bool "Board can contain Kaby Lake DUAL core"
default y
config MAINBOARD_SUPPORTS_KABYLAKE_QUAD
bool "Board can contain Kaby Lake QUAD core"
default y
endif
endif

10
src/soc/intel/skylake/Makefile.inc
View File

@ -79,18 +79,28 @@ postcar-y += i2c.c
postcar-y += uart.c
ifeq ($(CONFIG_SKYLAKE_SOC_PCH_H),y)
ifeq ($(CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU),y)
# Skylake H Q0
cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-5e-03
endif
ifeq ($(CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU),y)
# Kabylake H B0 S0
cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-09
endif
else
ifeq ($(CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU),y)
# Skylake D0
cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-4e-03
endif
ifeq ($(CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL),y)
# Kabylake H0, J0, J1
cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-09
endif
ifeq ($(CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD),y)
# Kabylake Y0
cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0a
endif
endif
# Missing for Skylake C0 (0x406e2), Kabylake G0 (0x406e8), Kabylake HA0 (0x506e8)
# since those are probably pre-release samples.