purism/librem13v2: Clean up devicetree
- remove unused I2C, serialIO defs - set PL2 override, VR mailbox cmd based on SKL-U ref board, as values copied from google/chell are for SKL-Y Change-Id: I3a138c28d0322df6cb41ec1a845ae31602cb69a7 Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm> Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/19941 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
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@ -165,30 +165,11 @@ chip soc/intel/skylake
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register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Port (right)
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register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Port (right)
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register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C Port
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register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C Port
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register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V
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# PL2 override 25W
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register "tdp_pl2_override" = "25"
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# Must leave UART0 enabled or SD/eMMC will not work as PCI
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# Send an extra VR mailbox command for the PS4 exit issue
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register "SerialIoDevMode" = "{
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register "SendVrMbxCmd" = "2"
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[PchSerialIoIndexI2C0] = PchSerialIoPci,
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[PchSerialIoIndexI2C1] = PchSerialIoPci,
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[PchSerialIoIndexI2C2] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C4] = PchSerialIoPci,
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[PchSerialIoIndexI2C5] = PchSerialIoDisabled,
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[PchSerialIoIndexSpi0] = PchSerialIoDisabled,
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[PchSerialIoIndexSpi1] = PchSerialIoDisabled,
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[PchSerialIoIndexUart0] = PchSerialIoPci,
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[PchSerialIoIndexUart1] = PchSerialIoDisabled,
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[PchSerialIoIndexUart2] = PchSerialIoSkipInit,
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}"
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# PL2 override 15W
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register "tdp_pl2_override" = "15"
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register "tcc_offset" = "10" # TCC of 90C
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# Send an extra VR mailbox command for the supported MPS IMVP8 model
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register "SendVrMbxCmd" = "1"
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device cpu_cluster 0 on
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device cpu_cluster 0 on
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device lapic 0 on end
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device lapic 0 on end
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