purism/librem13v2: Update USB config

Update devicetree USB config based on board spec.
Leave OC pins set to skip since the info is unavailable.

Change-Id: I2a4fe17ed7edacbbbaf56969f9d2801b45a20da9
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/19940
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Matt DeVillier 2017-05-25 15:50:59 -05:00 committed by Martin Roth
parent 9c27eda052
commit 2fa66164d8
1 changed files with 7 additions and 9 deletions

View File

@ -155,17 +155,15 @@ chip soc/intel/skylake
# ClkReq for NVMe - Bruteforced (no other value works)
register "PcieRpClkReqNumber[8]" = "2"
register "usb2_ports[0]" = "USB2_PORT_LONG(OC2)" # Type-C Port 1
register "usb2_ports[1]" = "USB2_PORT_LONG(OC3)" # Type-C Port 2
register "usb2_ports[0]" = "USB2_PORT_LONG(OC_SKIP)" # Type-C Port
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port (right)
register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
register "usb2_ports[4]" = "USB2_PORT_MID(OC0)" # Type-A Port
register "usb2_ports[6]" = "USB2_PORT_FLEX(OC_SKIP)" # Camera
register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # SD
register "usb2_ports[3]" = "USB2_PORT_FLEX(OC_SKIP)" # Camera
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port (left)
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # SD
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)" # Type-C Port 1
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC3)" # Type-C Port 2
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC0)" # Type-A Port
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # SD
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Port (right)
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C Port
register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V