src/arch: Remove unnecessary space after casts

Change-Id: I00551dfd963d47a58284bc31f21b0fa12130fe78
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69816
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/arch/arm/eabi_compat.c

@@ -26,11 +26,11 @@ void __aeabi_unwind_cpp_pr1(void)
 void __aeabi_memcpy(void *dest, const void *src, size_t n);
 void __aeabi_memcpy(void *dest, const void *src, size_t n)
 {
-	(void) memcpy(dest, src, n);
+	(void)memcpy(dest, src, n);
 }
 
 void __aeabi_memset(void *dest, size_t n, int c);
 void __aeabi_memset(void *dest, size_t n, int c)
 {
-	(void) memset(dest, c, n);
+	(void)memset(dest, c, n);
 }

src/arch/arm/libgcc/umoddi3.c

@@ -4,6 +4,6 @@
 uint64_t __umoddi3(uint64_t num, uint64_t den)
 {
 	uint64_t v;
-	(void) __udivmoddi4(num, den, &v);
+	(void)__udivmoddi4(num, den, &v);
 	return v;
 }

src/arch/riscv/trap_handler.c

@@ -64,8 +64,8 @@ static void print_trap_information(const trapframe *tf)
 			previous_mode, mprv? " (MPRV)":"");
 	printk(BIOS_DEBUG, "Bad instruction pc: %p\n", (void *)tf->epc);
 	printk(BIOS_DEBUG, "Bad address:        %p\n", (void *)tf->badvaddr);
-	printk(BIOS_DEBUG, "Stored ra:          %p\n", (void*) tf->gpr[1]);
+	printk(BIOS_DEBUG, "Stored ra:          %p\n", (void *)tf->gpr[1]);
-	printk(BIOS_DEBUG, "Stored sp:          %p\n", (void*) tf->gpr[2]);
+	printk(BIOS_DEBUG, "Stored sp:          %p\n", (void *)tf->gpr[2]);
 }
 
 static void interrupt_handler(trapframe *tf)

src/arch/x86/cpu.c

@@ -59,7 +59,7 @@ static inline int test_cyrix_52div(void)
 	     : "cc");
 
 	/* AH is 0x02 on Cyrix after the divide.. */
-	return (unsigned char) (test >> 8) == 0x02;
+	return (unsigned char)(test >> 8) == 0x02;
 }
 
 /*

src/arch/x86/memset.c

@@ -12,7 +12,7 @@ typedef uint32_t op_t;
 void *memset(void *dstpp, int c, size_t len)
 {
 	int d0;
-	unsigned long int dstp = (unsigned long int) dstpp;
+	unsigned long int dstp = (unsigned long int)dstpp;
 
 #if (ENV_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)) || \
 		(ENV_RAMSTAGE && CONFIG(ASAN_IN_RAMSTAGE))
@@ -22,7 +22,7 @@ void *memset(void *dstpp, int c, size_t len)
 	/* This explicit register allocation improves code very much indeed. */
 	register op_t x asm("ax");
 
-	x = (unsigned char) c;
+	x = (unsigned char)c;
 
 	/* Clear the direction flag, so filling will move forward.  */
 	asm volatile("cld");

src/arch/x86/pirq_routing.c

@@ -17,7 +17,7 @@ static void check_pirq_routing_table(struct irq_routing_table *rt)
 	if (sizeof(struct irq_routing_table) != rt->size) {
 		printk(BIOS_WARNING,
 			"Inconsistent Interrupt Routing Table size (0x%x/0x%x).\n",
-			(unsigned int) sizeof(struct irq_routing_table),
+			(unsigned int)sizeof(struct irq_routing_table),
 			rt->size);
 		rt->size = sizeof(struct irq_routing_table);
 	}