Rework boolean expression (DeMorgan and all) for

better readability.
Also remove failover.c files in mainboards, as they're
not used anymore (and useless, too)

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5258 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/mainboard/amd/dbm690t/romstage.c

@@ -111,7 +111,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	struct cpuid_result cpuid1;
 	struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
 
-	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+	if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 		enumerate_ht_chain();

src/mainboard/amd/mahogany/romstage.c

@@ -111,7 +111,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	struct cpuid_result cpuid1;
 	struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
 
-	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+	if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 		enumerate_ht_chain();

src/mainboard/amd/mahogany_fam10/romstage.c

@@ -156,7 +156,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	u32 val;
 	msr_t msr;
 
-	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+	if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 		/* mov bsp to bus 0xff when > 8 nodes */

src/mainboard/amd/pistachio/romstage.c

@@ -107,7 +107,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	    (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE -
 				CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
 
-	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+	if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 		enumerate_ht_chain();

src/mainboard/amd/serengeti_cheetah/romstage.c

@@ -189,7 +189,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	struct cpuid_result cpuid1;
 #endif
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/amd/serengeti_cheetah_fam10/romstage.c

@@ -160,7 +160,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	u32 val;
 	msr_t msr;
 
-	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+	if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 		/* mov bsp to bus 0xff when > 8 nodes */

src/mainboard/arima/hdama/romstage.c

@@ -114,7 +114,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	struct mem_controller ctrl[8];
 	unsigned nodes;
 
-	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+	if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/asus/a8n_e/romstage.c

@@ -134,7 +134,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	unsigned nodes, bsp_apicid = 0;
 	struct mem_controller ctrl[8];
 
-	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+	if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 		enumerate_ht_chain();

src/mainboard/asus/a8v-e_se/romstage.c

@@ -201,7 +201,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	print_info("now booting... fallback\r\n");
 
 	/* Is this a CPU only reset? Or is this a secondary CPU? */
-	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+	if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0. */
 		/* Allow the HT devices to be found. */
 		enumerate_ht_chain();

src/mainboard/broadcom/blast/romstage.c

@@ -125,7 +125,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         struct mem_controller ctrl[8];
         unsigned nodes;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {  
+        if (!cpu_init_detectedx && boot_cpu()) {  
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/dell/s1850/failover.c

@@ -1,19 +0,0 @@
-#define ASSEMBLY 1
-#define __PRE_RAM__
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <arch/romcc_io.h>
-#include <cpu/x86/lapic.h>
-#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
-#include "pc80/mc146818rtc_early.c"
-#include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/intel/e7520/memory_initialized.c"
-
-static unsigned long main(unsigned long bist)
-{
-	/* skip all this nonsense as we are not doing fallback yet */
-	return bist;
-}

src/mainboard/emulation/qemu-x86/failover.c

@@ -1,14 +0,0 @@
-#define __PRE_RAM__
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include "arch/romcc_io.h"
-/* no code inclusion allowed */
-//#include "pc80/mc146818rtc_early.c"
-//#include "cpu/x86/lapic/boot_cpu.c"
-
-static void main(void)
-{
-}
-

src/mainboard/gigabyte/ga_2761gxdk/romstage.c

@@ -193,7 +193,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         int needs_reset = 0;
         unsigned bsp_apicid = 0;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/gigabyte/m57sli/romstage.c

@@ -194,7 +194,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         unsigned bsp_apicid = 0;
 	uint8_t tmp = 0;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/hp/dl145_g3/romstage.c

@@ -216,7 +216,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	 int needs_reset;
 	 unsigned bsp_apicid = 0;
 
-	 if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+	 if (!cpu_init_detectedx && boot_cpu()) {
 		 /* Nothing special needs to be done to find bus 0 */
 		 /* Allow the HT devices to be found */
 

src/mainboard/ibm/e325/romstage.c

@@ -123,7 +123,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
         int needs_reset;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/ibm/e326/romstage.c

@@ -122,7 +122,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
         int needs_reset;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/intel/jarrell/failover.c

@@ -1,18 +0,0 @@
-#define ASSEMBLY 1
-#define __PRE_RAM__
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <arch/romcc_io.h>
-#include <cpu/x86/lapic.h>
-#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
-#include "pc80/mc146818rtc_early.c"
-#include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/intel/e7520/memory_initialized.c"
-
-static unsigned long main(unsigned long bist)
-{
-	return bist;
-}

src/mainboard/intel/xe7501devkit/failover.c

@@ -1,17 +0,0 @@
-#define ASSEMBLY 1
-#define __PRE_RAM__
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <arch/romcc_io.h>
-#include <cpu/x86/lapic.h>
-#include "pc80/mc146818rtc_early.c"
-#include "southbridge/intel/i82801cx/cmos_failover.c"
-#include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/intel/e7501/reset_test.c"
-
-static unsigned long main(unsigned long bist)
-{
-	return bist;
-}

src/mainboard/iwill/dk8_htx/romstage.c

@@ -154,7 +154,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         int needs_reset; int i;
         unsigned bsp_apicid = 0;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/iwill/dk8s2/romstage.c

@@ -154,7 +154,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         int needs_reset; int i;
         unsigned bsp_apicid = 0;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/iwill/dk8x/romstage.c

@@ -154,7 +154,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         int needs_reset; int i;
         unsigned bsp_apicid = 0;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/kontron/kt690/romstage.c

@@ -113,7 +113,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	struct cpuid_result cpuid1;
 	struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
 
-	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+	if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 		enumerate_ht_chain();

src/mainboard/msi/ms7135/romstage.c

@@ -137,7 +137,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	struct mem_controller ctrl[8];
 	unsigned nodes;
 
-	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+	if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 		enumerate_ht_chain();

src/mainboard/msi/ms7260/romstage.c

@@ -170,7 +170,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	int needs_reset = 0;
 	unsigned bsp_apicid = 0;
 
-	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+	if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0. */
 		/* Allow the HT devices to be found. */
 		enumerate_ht_chain();

src/mainboard/msi/ms9185/romstage.c

@@ -174,7 +174,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         int needs_reset;
         unsigned bsp_apicid = 0;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/msi/ms9282/romstage.c

@@ -175,7 +175,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
        char *p ;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/msi/ms9652_fam10/romstage.c

@@ -178,7 +178,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	u32 wants_reset;
 	msr_t msr;
 
-	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+	if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/newisys/khepri/romstage.c

@@ -128,7 +128,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         struct mem_controller ctrl[8];
         unsigned nodes;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/nvidia/l1_2pvv/romstage.c

@@ -192,7 +192,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	int needs_reset = 0;
 	unsigned bsp_apicid = 0;
 
-	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+	if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/olpc/btest/failover.c

@@ -1,13 +0,0 @@
-#define ASSEMBLY 1
-#define __PRE_RAM__
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include "arch/romcc_io.h"
-#include "pc80/mc146818rtc_early.c"
-
-static unsigned long main(unsigned long bist)
-{
-	return bist;
-}

src/mainboard/olpc/rev_a/failover.c

@@ -1,13 +0,0 @@
-#define ASSEMBLY 1
-#define __PRE_RAM__
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include "arch/romcc_io.h"
-#include "pc80/mc146818rtc_early.c"
-
-static unsigned long main(unsigned long bist)
-{
-	return bist;
-}

src/mainboard/sunw/ultra40/romstage.c

@@ -161,7 +161,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         struct mem_controller ctrl[8];
         unsigned nodes;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/supermicro/h8dme/romstage.c

@@ -252,7 +252,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	int needs_reset = 0;
 	unsigned bsp_apicid = 0;
 
-	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+	if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/supermicro/h8dmr/romstage.c

@@ -185,7 +185,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         int needs_reset = 0;
         unsigned bsp_apicid = 0;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/supermicro/h8dmr_fam10/romstage.c

@@ -177,7 +177,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	u32 wants_reset;
 	msr_t msr;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/supermicro/h8qme_fam10/romstage.c

@@ -220,7 +220,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	u32 wants_reset;
 	msr_t msr;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/supermicro/x6dai_g/failover.c

@@ -1,18 +0,0 @@
-#define ASSEMBLY 1
-#define __PRE_RAM__
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <arch/romcc_io.h>
-#include <cpu/x86/lapic.h>
-#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
-#include "pc80/mc146818rtc_early.c"
-#include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/intel/e7525/memory_initialized.c"
-
-static unsigned long main(unsigned long bist)
-{
-	return bist;
-}

src/mainboard/supermicro/x6dhe_g/failover.c

@@ -1,18 +0,0 @@
-#define ASSEMBLY 1
-#define __PRE_RAM__
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <arch/romcc_io.h>
-#include <cpu/x86/lapic.h>
-#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
-#include "pc80/mc146818rtc_early.c"
-#include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/intel/e7520/memory_initialized.c"
-
-static unsigned long main(unsigned long bist)
-{
-	return bist;
-}

src/mainboard/supermicro/x6dhe_g2/failover.c

@@ -1,18 +0,0 @@
-#define ASSEMBLY 1
-#define __PRE_RAM__
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <arch/romcc_io.h>
-#include <cpu/x86/lapic.h>
-#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
-#include "pc80/mc146818rtc_early.c"
-#include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/intel/e7520/memory_initialized.c"
-
-static unsigned long main(unsigned long bist)
-{
-	return bist;
-}

src/mainboard/supermicro/x6dhr_ig/failover.c

@@ -1,18 +0,0 @@
-#define ASSEMBLY 1
-#define __PRE_RAM__
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <arch/romcc_io.h>
-#include <cpu/x86/lapic.h>
-#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
-#include "pc80/mc146818rtc_early.c"
-#include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/intel/e7520/memory_initialized.c"
-
-static unsigned long main(unsigned long bist)
-{
-	return bist;
-}

src/mainboard/supermicro/x6dhr_ig2/failover.c

@@ -1,18 +0,0 @@
-#define ASSEMBLY 1
-#define __PRE_RAM__
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <arch/romcc_io.h>
-#include <cpu/x86/lapic.h>
-#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
-#include "pc80/mc146818rtc_early.c"
-#include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/intel/e7520/memory_initialized.c"
-
-static unsigned long main(unsigned long bist)
-{
-	return bist;
-}

src/mainboard/technexion/tim5690/romstage.c

@@ -114,7 +114,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	struct cpuid_result cpuid1;
 	struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
 
-	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+	if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 		enumerate_ht_chain();

src/mainboard/technexion/tim8690/romstage.c

@@ -112,7 +112,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
 
 
-	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+	if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 		enumerate_ht_chain();

src/mainboard/tyan/s2850/romstage.c

@@ -112,7 +112,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
         int needs_reset;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/tyan/s2875/romstage.c

@@ -114,7 +114,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
         int needs_reset;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/tyan/s2880/romstage.c

@@ -115,7 +115,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
         int needs_reset;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/tyan/s2881/romstage.c

@@ -118,7 +118,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         struct mem_controller ctrl[8];
         unsigned nodes;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/tyan/s2882/romstage.c

@@ -118,7 +118,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
         int needs_reset;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/tyan/s2885/romstage.c

@@ -118,7 +118,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         struct mem_controller ctrl[8];
         unsigned nodes;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/tyan/s2891/romstage.c

@@ -127,7 +127,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	struct mem_controller ctrl[8];
 	unsigned nodes;
 
-	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+	if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/tyan/s2892/romstage.c

@@ -116,7 +116,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	struct mem_controller ctrl[8];
 	unsigned nodes;
 
-	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+	if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/tyan/s2895/romstage.c

@@ -166,7 +166,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	struct mem_controller ctrl[8];
 	unsigned nodes;
 
-	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+	if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/tyan/s2912/romstage.c

@@ -192,7 +192,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	int needs_reset = 0;
 	unsigned bsp_apicid = 0;
 
-	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+	if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/tyan/s2912_fam10/romstage.c

@@ -182,7 +182,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	u32 wants_reset;
 	msr_t msr;
 
-	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+	if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/tyan/s4880/romstage.c

@@ -165,7 +165,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
         int needs_reset;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/tyan/s4882/romstage.c

@@ -145,7 +145,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         struct mem_controller ctrl[8];
         unsigned nodes;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 

src/mainboard/via/epia-m/failover.c

@@ -1,13 +0,0 @@
-#define ASSEMBLY 1
-#define __PRE_RAM__
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include "arch/romcc_io.h"
-#include "pc80/mc146818rtc_early.c"
-
-static unsigned long main(unsigned long bist)
-{
-	return bist;
-}

src/mainboard/via/epia-n/failover.c

@@ -1,13 +0,0 @@
-#define ASSEMBLY 1
-#define __PRE_RAM__
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include "arch/romcc_io.h"
-#include "pc80/mc146818rtc_early.c"
-
-static unsigned long main(unsigned long bist)
-{
-	return bist;
-}