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mb/google/brya/var/brask: set tcc_offset value to 10℃ 

Set tcc_offset value to 10 in devicetree for Thermal Control Circuit
(TCC) activation feature. This value is suggested by Thermal team.

BUG=b:214890058
BRANCH=None
TEST=build pass

Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Change-Id: I86acb172ed427d45973b9360e0413978cbd46645
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61142
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
David Wu 2022-01-17 15:56:53 +08:00 committed by Felix Held
parent d87b0c371e
commit 2bff154598
1 changed files with 2 additions and 0 deletions
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src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb
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@ -17,6 +17,8 @@ chip soc/intel/alderlake
# DPTF enable # DPTF enable
register "dptf_enable" = "1" register "dptf_enable" = "1"
register "tcc_offset" = "10" # TCC of 90
# Enable CNVi BT # Enable CNVi BT
register "CnviBtCore" = "true" register "CnviBtCore" = "true"