mb/google/brya/var/brask: set tcc_offset value to 10℃

Set tcc_offset value to 10 in devicetree for Thermal Control Circuit
(TCC) activation feature. This value is suggested by Thermal team.

BUG=b:214890058
BRANCH=None
TEST=build pass

Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Change-Id: I86acb172ed427d45973b9360e0413978cbd46645
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61142
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb

@@ -17,6 +17,8 @@ chip soc/intel/alderlake
 	# DPTF enable
 	register "dptf_enable" = "1"
 
+	register "tcc_offset" = "10"     # TCC of 90
+
 	# Enable CNVi BT
 	register "CnviBtCore" = "true"