haswell: relocate `romstage_common` to northbridge
Other platforms do this as well. It will ease refactoring on follow-ups. Change-Id: I643982a58c6f5370c78acef93740f27df001a06d Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43093 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
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@ -1,5 +1,4 @@
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ramstage-y += haswell_init.c
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romstage-y += romstage.c
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romstage-y += ../car/romstage.c
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ramstage-y += acpi.c
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@ -118,16 +118,6 @@
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# error "CONFIG_IED_REGION_SIZE is not a power of 2"
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#endif
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struct pei_data;
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struct rcba_config_instruction;
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struct romstage_params {
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struct pei_data *pei_data;
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const void *gpio_map;
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const struct rcba_config_instruction *rcba_config;
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void (*copy_spd)(struct pei_data *);
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};
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void romstage_common(const struct romstage_params *params);
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/* Lock MSRs */
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void intel_cpu_haswell_finalize_smm(void);
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@ -14,6 +14,7 @@ ramstage-y += minihd.c
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romstage-y += memmap.c
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romstage-y += raminit.c
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romstage-y += romstage.c
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romstage-y += early_init.c
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romstage-y += report_platform.c
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@ -189,6 +189,16 @@
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void intel_northbridge_haswell_finalize_smm(void);
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struct pei_data;
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struct rcba_config_instruction;
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struct romstage_params {
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struct pei_data *pei_data;
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const void *gpio_map;
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const struct rcba_config_instruction *rcba_config;
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void (*copy_spd)(struct pei_data *peid);
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};
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void romstage_common(const struct romstage_params *params);
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void haswell_early_initialization(void);
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void haswell_late_initialization(void);
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void set_translation_table(int start, int end, u64 base, int inc);
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@ -7,11 +7,11 @@
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#include <cbmem.h>
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#include <commonlib/helpers.h>
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#include <romstage_handoff.h>
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#include <cpu/intel/haswell/haswell.h>
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#include <northbridge/intel/haswell/haswell.h>
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#include <northbridge/intel/haswell/raminit.h>
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#include <southbridge/intel/lynxpoint/pch.h>
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#include <southbridge/intel/lynxpoint/me.h>
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#include "haswell.h"
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void romstage_common(const struct romstage_params *params)
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{
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