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sb/intel/i82801xx: Use common RCBA MACROs 

Change-Id: I61fb3b01ff15ba2da2ee938addfa630c282c9870
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/27043
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Arthur Heymans 2018-06-13 00:07:09 +02:00 committed by Patrick Georgi
parent 8d0e88db34
commit 2e464cf3b0
3 changed files with 5 additions and 27 deletions
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10
src/southbridge/intel/i82801gx/i82801gx.h
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@ -31,11 +31,7 @@
#define DEFAULT_GPIOBASE 0x0480 #define DEFAULT_GPIOBASE 0x0480
#define DEFAULT_PMBASE 0x0500 #define DEFAULT_PMBASE 0x0500
#ifndef __ACPI__ #include <southbridge/intel/common/rcba.h>
#define DEFAULT_RCBA ((u8 *)0xfed1c000)
#else
#define DEFAULT_RCBA 0xfed1c000
#endif
#ifndef __ACPI__ #ifndef __ACPI__
#define DEBUG_PERIODIC_SMIS 0 #define DEBUG_PERIODIC_SMIS 0
@ -194,10 +190,6 @@ int southbridge_detect_s3_resume(void);
/* Root Complex Register Block */ /* Root Complex Register Block */
#define RCBA 0xf0 #define RCBA 0xf0
#define RCBA8(x) (*((volatile u8 *)(DEFAULT_RCBA + (x))))
#define RCBA16(x) (*((volatile u16 *)(DEFAULT_RCBA + (x))))
#define RCBA32(x) (*((volatile u32 *)(DEFAULT_RCBA + (x))))
#define VCH 0x0000 /* 32bit */ #define VCH 0x0000 /* 32bit */
#define VCAP1 0x0004 /* 32bit */ #define VCAP1 0x0004 /* 32bit */
#define VCAP2 0x0008 /* 32bit */ #define VCAP2 0x0008 /* 32bit */

11
src/southbridge/intel/i82801ix/i82801ix.h
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@ -25,11 +25,8 @@
#endif #endif
#define DEFAULT_TBAR ((u8 *)0xfed1b000) #define DEFAULT_TBAR ((u8 *)0xfed1b000)
#ifndef __ACPI__
#define DEFAULT_RCBA ((u8 *)0xfed1c000) #include <southbridge/intel/common/rcba.h>
#else
#define DEFAULT_RCBA 0xfed1c000
#endif
#if IS_ENABLED(CONFIG_BOARD_EMULATION_QEMU_X86_Q35) #if IS_ENABLED(CONFIG_BOARD_EMULATION_QEMU_X86_Q35)
/* /*
@ -154,10 +151,6 @@
#define SMB_SMI_EN (1 << 1) #define SMB_SMI_EN (1 << 1)
#define HST_EN (1 << 0) #define HST_EN (1 << 0)
#define RCBA8(x) *((volatile u8 *)(DEFAULT_RCBA + x))
#define RCBA16(x) *((volatile u16 *)(DEFAULT_RCBA + x))
#define RCBA32(x) *((volatile u32 *)(DEFAULT_RCBA + x))
#define RCBA_V0CTL 0x0014 #define RCBA_V0CTL 0x0014
#define RCBA_V1CAP 0x001c #define RCBA_V1CAP 0x001c
#define RCBA_V1CTL 0x0020 #define RCBA_V1CTL 0x0020

11
src/southbridge/intel/i82801jx/i82801jx.h
View File

@ -25,11 +25,8 @@
#endif #endif
#define DEFAULT_TBAR ((u8 *)0xfed1b000) #define DEFAULT_TBAR ((u8 *)0xfed1b000)
#ifndef __ACPI__
#define DEFAULT_RCBA ((u8 *)0xfed1c000) #include <southbridge/intel/common/rcba.h>
#else
#define DEFAULT_RCBA 0xfed1c000
#endif
#define DEFAULT_PMBASE 0x00000500 #define DEFAULT_PMBASE 0x00000500
#define DEFAULT_TCOBASE (DEFAULT_PMBASE + 0x60) #define DEFAULT_TCOBASE (DEFAULT_PMBASE + 0x60)
@ -147,10 +144,6 @@
#define SMB_SMI_EN (1 << 1) #define SMB_SMI_EN (1 << 1)
#define HST_EN (1 << 0) #define HST_EN (1 << 0)
#define RCBA8(x) *((volatile u8 *)(DEFAULT_RCBA + x))
#define RCBA16(x) *((volatile u16 *)(DEFAULT_RCBA + x))
#define RCBA32(x) *((volatile u32 *)(DEFAULT_RCBA + x))
#define RCBA_V0CTL 0x0014 #define RCBA_V0CTL 0x0014
#define RCBA_V1CAP 0x001c #define RCBA_V1CAP 0x001c
#define RCBA_V1CTL 0x0020 #define RCBA_V1CTL 0x0020