soc/imgtec/pistachio: add implementation for system reset

Implement system reset by calling the watchdog soft reset.
Following the soft reset, the SoC will reset to the same logic
state and therefore have the same effect as a hard (power-on)
reset except for:
 - watchdog scratch registers will be unaffected (hard reset
   will clear them)
 - the real time clock will be unaffected

BUG=none
TEST=tested on Pistachio bring up board

Change-Id: I1332c2249c756f6d8574fc5c407de52f88e60f08
Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
Reviewed-on: https://review.coreboot.org/12755
Tested-by: build bot (Jenkins)
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
This commit is contained in:
Ionela Voinescu 2015-12-17 13:11:50 +00:00 committed by Martin Roth
parent 3bdd45e714
commit 2e8d4ed794
1 changed files with 6 additions and 4 deletions

View File

@ -13,13 +13,15 @@
* GNU General Public License for more details.
*/
#include <arch/io.h>
#include <console/console.h>
#include <reset.h>
#define PISTACHIO_WD_ADDR 0xB8102100
#define PISTACHIO_WD_SW_RST_OFFSET 0x0000
void hard_reset(void)
{
printk(BIOS_EMERG, "reset failed!\n");
/* TBD */
for (;;)
;
/* Generate system reset */
write32(PISTACHIO_WD_ADDR + PISTACHIO_WD_SW_RST_OFFSET, 0x1);
}