from issue 53: don't set TOM2 if 4G less mem installed, opt for init_ecc
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2144 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -175,6 +175,47 @@ static void set_init_ecc_mtrrs(void)
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enable_cache();
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}
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static inline void clear_2M_ram(unsigned long basek, struct mtrr_state *mtrr_state)
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{
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unsigned long limitk;
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unsigned long size;
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void *addr;
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/* Report every 64M */
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if ((basek % (64*1024)) == 0) {
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/* Restore the normal state */
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map_2M_page(0);
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restore_mtrr_state(mtrr_state);
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enable_lapic();
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/* Print a status message */
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printk_debug("%c", (basek >= TOLM_KB)?'+':'-');
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/* Return to the initialization state */
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set_init_ecc_mtrrs();
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disable_lapic();
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}
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limitk = (basek + ZERO_CHUNK_KB) & ~(ZERO_CHUNK_KB - 1);
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#if 0
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/* couldn't happen, memory must on 2M boundary */
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if(limitk>endk) {
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limitk = enk;
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}
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#endif
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size = (limitk - basek) << 10;
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addr = map_2M_page(basek >> 11);
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if (addr == MAPPING_ERROR) {
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printk_err("Cannot map page: %x\n", basek >> 11);
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return;
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}
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/* clear memory 2M (limitk - basek) */
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addr = (void *)(((uint32_t)addr) | ((basek & 0x7ff) << 10));
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clear_memory(addr, size);
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}
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static void init_ecc_memory(unsigned node_id)
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{
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@ -182,6 +223,7 @@ static void init_ecc_memory(unsigned node_id)
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unsigned long hole_startk = 0;
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unsigned long basek;
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struct mtrr_state mtrr_state;
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device_t f1_dev, f2_dev, f3_dev;
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int enable_scrubbing;
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uint32_t dcl;
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@ -239,9 +281,10 @@ static void init_ecc_memory(unsigned node_id)
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/* Don't start too early */
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begink = startk;
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if (begink < CONFIG_LB_MEM_TOPK) {
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if (begink < CONFIG_LB_MEM_TOPK) {
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begink = CONFIG_LB_MEM_TOPK;
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}
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printk_debug("Clearing memory %uK - %uK: ", begink, endk);
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/* Save the normal state */
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@ -252,51 +295,29 @@ static void init_ecc_memory(unsigned node_id)
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disable_lapic();
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/* Walk through 2M chunks and zero them */
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for(basek = begink; basek < endk;
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basek = ((basek + ZERO_CHUNK_KB) & ~(ZERO_CHUNK_KB - 1)))
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{
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unsigned long limitk;
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unsigned long size;
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void *addr;
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#if K8_HW_MEM_HOLE_SIZEK != 0
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if ( hole_startk != 0 ) {
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if ((basek >= hole_startk) && (basek < 4*1024*1024)) continue;
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}
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/* here hole_startk can not be equal to begink, never. Also hole_startk is in 2M boundary, 64M? */
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if ( (hole_startk != 0) && ((begink < hole_startk) && (endk>(4*1024*1024)))) {
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for(basek = begink; basek < hole_startk;
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basek = ((basek + ZERO_CHUNK_KB) & ~(ZERO_CHUNK_KB - 1)))
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{
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clear_2M_ram(basek, &mtrr_state);
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}
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for(basek = 4*1024*1024; basek < endk;
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basek = ((basek + ZERO_CHUNK_KB) & ~(ZERO_CHUNK_KB - 1)))
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{
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clear_2M_ram(basek, &mtrr_state);
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}
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}
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else
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#endif
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/* Report every 64M */
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if ((basek % (64*1024)) == 0) {
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/* Restore the normal state */
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map_2M_page(0);
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restore_mtrr_state(&mtrr_state);
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enable_lapic();
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/* Print a status message */
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printk_debug("%c", (basek >= TOLM_KB)?'+':'-');
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/* Return to the initialization state */
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set_init_ecc_mtrrs();
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disable_lapic();
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}
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limitk = (basek + ZERO_CHUNK_KB) & ~(ZERO_CHUNK_KB - 1);
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if (limitk > endk) {
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limitk = endk;
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}
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size = (limitk - basek) << 10;
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addr = map_2M_page(basek >> 11);
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if (addr == MAPPING_ERROR) {
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printk_err("Cannot map page: %x\n", basek >> 11);
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continue;
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}
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/* clear memory 2M (limitk - basek) */
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addr = (void *)(((uint32_t)addr) | ((basek & 0x7ff) << 10));
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clear_memory(addr, size);
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for(basek = begink; basek < endk;
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basek = ((basek + ZERO_CHUNK_KB) & ~(ZERO_CHUNK_KB - 1)))
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{
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clear_2M_ram(basek, &mtrr_state);
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}
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/* Restore the normal state */
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map_2M_page(0);
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restore_mtrr_state(&mtrr_state);
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@ -149,10 +149,12 @@ void amd_setup_mtrrs(void)
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msr.lo = state.mmio_basek << 10;
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wrmsr(TOP_MEM, msr);
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/* Setup TOP_MEM2 */
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msr.hi = state.tomk >> 22;
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msr.lo = state.tomk << 10;
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wrmsr(TOP_MEM2, msr);
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if(state.tomk>(4*1024*1024)) {
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/* Setup TOP_MEM2 */
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msr.hi = state.tomk >> 22;
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msr.lo = state.tomk << 10;
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wrmsr(TOP_MEM2, msr);
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}
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/* zero the IORR's before we enable to prevent
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* undefined side effects.
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@ -882,9 +882,11 @@ static void set_top_mem(unsigned tom_k, unsigned hole_startk)
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/* Now set top of memory */
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msr_t msr;
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msr.lo = (tom_k & 0x003fffff) << 10;
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msr.hi = (tom_k & 0xffc00000) >> 22;
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wrmsr(TOP_MEM2, msr);
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if(tom_k>(4*1024*1024)) {
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msr.lo = (tom_k & 0x003fffff) << 10;
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msr.hi = (tom_k & 0xffc00000) >> 22;
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wrmsr(TOP_MEM2, msr);
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}
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/* Leave a 64M hole between TOP_MEM and TOP_MEM2
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* so I can see my rom chip and other I/O devices.
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