GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

northbridge/intel: Add i89xx header file 

The Intel northbridge must be paired with a southbridge. Add
the ii89xx southbridge header based on the config setting.

Change-Id: Ied708006310efaba31afe6977ab7e57fe4e5ceec
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/12167
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
This commit is contained in:
Marc Jones 2015-09-24 21:45:13 -06:00 committed by Martin Roth
parent 5a4554a73f
commit 31f4d00c95
2 changed files with 7 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/northbridge/intel/fsp_sandybridge/northbridge.h
View File

@ -55,8 +55,10 @@
#define DEFAULT_EPBAR 0xfed19000 /* 4 KB */ #define DEFAULT_EPBAR 0xfed19000 /* 4 KB */
#define DEFAULT_RCBABASE ((u8 *)0xfed1c000) #define DEFAULT_RCBABASE ((u8 *)0xfed1c000)
#if CONFIG_SOUTHBRIDGE_INTEL_FSP_BD82X6X #if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_FSP_BD82X6X)
#include <southbridge/intel/fsp_bd82x6x/pch.h> #include <southbridge/intel/fsp_bd82x6x/pch.h>
#elif IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_FSP_I89XX)
#include <southbridge/intel/fsp_i89xx/pch.h>
#endif #endif
/* Everything below this line is ignored in the DSDT */ /* Everything below this line is ignored in the DSDT */

5
src/northbridge/intel/fsp_sandybridge/report_platform.c
View File

@ -18,8 +18,11 @@
#include <arch/cpu.h> #include <arch/cpu.h>
#include <string.h> #include <string.h>
#if CONFIG_SOUTHBRIDGE_INTEL_FSP_BD82X6X
#if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_FSP_BD82X6X)
#include <southbridge/intel/fsp_bd82x6x/pch.h> #include <southbridge/intel/fsp_bd82x6x/pch.h>
#elif IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_FSP_I89XX)
#include <southbridge/intel/fsp_i89xx/pch.h>
#endif #endif
#include <arch/io.h> #include <arch/io.h>