GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

storage/mmc: Fix wrong frequency setting for HS speed mode 

Emmc spec, JEDEC Standard No. 84-B51, section 6.6.2.3, selection
flow of HS400 using Enhanced Strobe states that host should change
frequency to ≤ 52MHz when switching to HS speed mode first. In
current code, mmc_select_hs400() calls mmc_select_hs() to do this,
however caps are not cleared, so when switching from HS200 to HS400,
caps will still have DRVR_CAP_HS200, and mmc_recalculate_clock() will
set 200Mhz instead of ≤ 52MHz. As a result, switching to HS400 will
intermittently fail.

BUG=b:140124451
TEST=Switch speed from HS200 to HS400 on WHL RVP.

Change-Id: Ie639c7616105cca638417d7bc1db95b561afb7af
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37775
Reviewed-by: Selma Bensaid <selma.bensaid@intel.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Bora Guvendik 2019-12-16 16:51:38 -08:00 committed by Patrick Georgi
parent 25eb1b3149
commit 3280b76729
1 changed files with 1 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/commonlib/storage/mmc.c
View File

@ -186,6 +186,7 @@ static int mmc_select_hs(struct storage_media *media)
/* Increase the controller clock speed */
SET_TIMING(media->ctrlr, BUS_TIMING_MMC_HS);
media->caps &= ~(DRVR_CAP_HS200 | DRVR_CAP_HS400);
media->caps |= DRVR_CAP_HS52 | DRVR_CAP_HS;
mmc_recalculate_clock(media);
ret = sd_mmc_send_status(media, SD_MMC_IO_RETRIES);