sb/intel/lynxpoint: Ensure the finalise handler is called
The finalise handler is not called during S3 resume when using the `BS_PAYLOAD_BOOT` approach. So, adopt the `lpc_final` approach used by bd82x6x and others. Tested on an ASRock H81M-HDS. The finalise handler is now called on the normal boot path, and during S3 resume. Change-Id: I9766a8dcbcb38420e937c810d252fef071851e92 Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/c/29976 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -967,6 +967,11 @@ static unsigned long southbridge_write_acpi_tables(struct device *device,
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return current;
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}
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static void lpc_final(struct device *dev)
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{
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if (acpi_is_wakeup_s3() || IS_ENABLED(CONFIG_INTEL_CHIPSET_LOCKDOWN))
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outb(APM_CNT_FINALIZE, APM_CNT);
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}
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static struct pci_operations pci_ops = {
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.set_subsystem = set_subsystem,
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@ -981,6 +986,7 @@ static struct device_operations device_ops = {
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.acpi_name = lpc_acpi_name,
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.write_acpi_tables = southbridge_write_acpi_tables,
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.init = lpc_init,
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.final = lpc_final,
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.enable = pch_lpc_enable,
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.scan_bus = scan_lpc_bus,
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.ops_pci = &pci_ops,
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@ -118,17 +118,3 @@ void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
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"d" (APM_CNT)
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);
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}
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/*
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* Finalize system before payload boot if INTEL_CHIPSET_LOCKDOWN=y
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*/
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#if IS_ENABLED(CONFIG_INTEL_CHIPSET_LOCKDOWN)
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static void finalize_boot(void *unused)
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{
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outb(APM_CNT_FINALIZE, APM_CNT);
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}
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BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, finalize_boot, NULL);
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#endif
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